MITSUMI

The data format of the MM1422 series is set as shown in the above figure. Out of the address bytes, first 7

bits are assigned to the slave addresses, while the residual 1 bit is assigned to the R/W bit. Set the R/W bit to

0 when data are used as control registers. Slave address of the MM1422 series is 90H. Each bit of control

registers is reset to 0. MM1422 series consists of one address byte and two control data bytes(3 bytes in

total). For details of the control contents of control register 1 and 2, refer to the separate table.

All data over the limited length (4th and subsequent bytes) are fully neglected. Because of this, the faulty

operation that switch changes by the data after the 4th byte doesn't occur.

Each audio output can be set to mute by setting MUTE terminal to high.

[Status registers]

There is no preparation of the status register in MM1422 series. A status register returns all the 1 when is set

in the R/W bit.

b7

b6

b5

b4

b3

b2

b1

b0

OUT 1 select

OUT 2 select

OUT 3 select

FS CTRL

b7

b6

b5

b4

b3

b2

b1

b0

0, 12dB select

Port 1 CTRL

Port 2 CTRL

Audio OUT2 gain select

Audio OUT3 gain select

Mute

[Control Register 1]

[Control Register 2]

S

Slave address

R/W

A

status register

NA

P

10010001

b7

b6

b5

b4

b3

b2

b1

b0

Address byte

Status data