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M464S6454EN0 Datasheet(PDF) 11 Page - Samsung semiconductor |
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M464S6454EN0 Datasheet(HTML) 11 Page - Samsung semiconductor |
11 / 18 page 128MB, 256MB, 512MB Unbuffered SODIMM Rev. 1.5 May 2004 SDRAM DC CHARACTERISTICS (Recommended operating condition unless otherwise noted, TA = 0 to 70 °C) Parameter Symbol Test Condition Version Unit Note 7A Operating current (One bank active) ICC1 Burst length = 1 tRC ≥ tRC(min) IO = 0 mA 460 mA 1 Precharge standby current in power-down mode ICC2P CKE ≤ VIL(max), tCC = 10ns 16 mA ICC2PS CKE & CLK ≤ VIL(max), tCC =∞ 16 Precharge standby current in non power-down mode ICC2N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns Input signals are changed one time during 20ns 160 mA ICC2NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC =∞ Input signals are stable 80 Active standby current in power-down mode ICC3P CKE ≤ VIL(max), tCC = 10ns 50 mA ICC3PS CKE & CLK ≤ VIL(max), tCC =∞ 50 Active standby current in non power-down mode (One bank active) ICC3N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns Input signals are changed one time during 20ns 200 mA ICC3NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC =∞ Input signals are stable 200 mA Operating current (Burst mode) ICC4 IO = 0 mA Page burst 4Banks activated tCCD = 2CLKs 620 mA 1 Refresh current ICC5 tRC ≥ tRC(min) 820 mA 2 Self refresh current ICC6 CKE ≤ 0.2V C 24 mA L 12 mA 1. Measured with outputs open. 2. Refresh period is 64ms. 3. Unless otherwise noted, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ) Notes : M464S3254ETS (32M x 64, 256MB Module) |
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