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AR0542 Datasheet(PDF) 17 Page - ON Semiconductor |
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AR0542 Datasheet(HTML) 17 Page - ON Semiconductor |
17 / 55 page AR0542 www.onsemi.com 17 Set reset_register[12] to disable the serializer while in parallel output mode. To use the parallel interface, the VDD_TX pad must be tied to a 1.8 V supply. For MIPI sensor, the VDD_IO supply can be set at 1.8 V or 2.8 V (nominal). Output Enable Control When the parallel pixel data interface is enabled, its signals can be switched asynchronously between the driven and High-Z under pin or register control, as shown in Table 7. Selection of a pin to use for the OE_N function is described in ”General Purpose Inputs”. Table 7. OUTPUT ENABLE CONTROL OE_N Pin Drive Signals R0x301A–B[6] Description Disabled 0 Interface High-Z Disabled 1 Interface Driven 1 0 Interface High-Z X 1 Interface Driven 0 X Interface Driven Configuration of the Pixel Data Interface Fields in R0x301A are used to configure the operation of the pixel data interface. The supported combinations are shown in Table 8. Table 8. CONFIGURATION OF THE PIXEL DATA INTERFACE Serializer Disable R0x301 A–B[12] Parallel Enable R0x301A–B[7] Standby End-of-Frame R0x301A–B[4] Description 0 0 1 Power up default Serial pixel data interface and its clocks are enabled. Transitions to soft standby are synchronized to the end of frames on the serial pixel data interface 1 1 0 Parallel pixel data interface, sensor core data output. Serial pixel data interface and its clocks disabled to save power. Transitions to soft standby are synchronized to the end of the current row readout on the parallel pixel data interface 1 1 1 Parallel pixel data interface, sensor core data output. Serial pixel data interface and its clocks disabled to save power. Transitions to soft standby are synchronized to the end of frames in the parallel pixel data interface |
Similar Part No. - AR0542_17 |
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Similar Description - AR0542_17 |
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