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AR0130CS Datasheet(PDF) 11 Page - ON Semiconductor

Part # AR0130CS
Description  1/3?릋nch CMOS Digital Image Sensor
Download  39 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

AR0130CS Datasheet(HTML) 11 Page - ON Semiconductor

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AR0130CS
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11
LV and FV
The timing of the FV and LV outputs is closely related to
the row time and the frame time.
FV will be asserted for an integral number of row times,
which will normally be equal to the height of the output
image.
LV will be asserted during the valid pixels of each row.
The leading edge of LV will be offset from the leading edge
of FV by 6 PIXCLKs. Normally, LV will only be asserted if
FV is asserted; this is configurable as described below.
LV Format Options
The default situation is for LV to be de−asserted when FV
is de−asserted. By configuring R0x306E[1:0], the LV signal
can take two different output formats. The formats for
reading out four lines and two vertical blanking lines are
shown in Figure 10.
Figure 10. LV Format Options
Default
Continuous LV
FV
LV
FV
LV
The timing of an entire frame is shown in Figure 11: “Line
Timing and FRAME_VALID/LINE_VALID Signals”.
Frame Time
The pixel clock (PIXCLK) represents the time needed to
sample 1 pixel from the array. The sensor outputs data at the
maximum rate of 1 pixel per PIXCLK. One row time (tROW)
is the period from the first pixel output in a row to the first
pixel output in the next row. The row time and frame time are
defined by equations in Table 4.
Figure 11. Line Timing and FRAME_VALID/LINE_VALID Signals
Table 4. FRAME TIME (Example Based on 1280 x 960, 45 Frames Per Second)
Parameter
Name
Equation
Timing at 74.25 MHz
A
Active data time
Context A: R0x3008 − R0x3004 + 1
Context B: R0x308E − R0x308A + 1
1280 pixel clocks
= 17.23 ms
P1
Frame start blanking
6 (fixed)
6 pixel clocks
= 0.08 ms
P2
Frame end blanking
6 (fixed)
6 pixel clocks
= 0.08 ms
Q
Horizontal blanking
R0x300C − A
370 pixel clocks
= 4.98 ms
A+Q (tROW)
Line (Row) time
R0x300C
1650 pixel clocks
= 22.22 ms
V
Vertical blanking
Context A: (R0x300A−(R0x3006−R0x3002+1)) x (A + Q)
Context B: ((R0x30AA−(R0x3090−R0x308C+1)) x (A + Q)
49,500 pixel clocks
= 666.66 ms


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