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ADS8412IPFBTG4 Datasheet(PDF) 4 Page - Burr-Brown (TI) |
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ADS8412IPFBTG4 Datasheet(HTML) 4 Page - Burr-Brown (TI) |
4 / 26 page www.ti.com ADS8412 SLAS384A – JUNE 2003 – REVISED DECEMBER 2004 SPECIFICATIONS (continued) T A = –40°C to 85°C, +VA = 5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 2 MHz (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT EXTERNAL VOLTAGE REFERENCE INPUT Vref Reference voltage at REFIN 3.9 4.096 4.2 V Reference resistance(7) 500 k Ω INTERNAL REFERENCE OUTPUT From 95% (+VA), with 1 µF Internal reference start-up time 120 ms storage capacity Vref Reference voltage IOUT = 0 4.065 4.096 4.13 V Source current Static load 10 µA Line regulation +VA = 4.75 ~ 5.25 V 0.6 mV Drift IOUT = 0 36 PPM/ °C DIGITAL INPUT/OUTPUT Logic family — CMOS VIH High level input voltage IIH = 5 µA +VBD – 1 +VBD + 0.3 VIL Low level input voltage IIL = 5 µA –0.3 0.8 V VOH High level output voltage IOH = 2 TTL loads +VBD – 0.6 +VBD VOL Low level output voltage IOL = 2 TTL loads 0 0.4 Data format – 2's complement POWER SUPPLY REQUIREMENTS +VBD 2.7 3 5.25 Power supply voltage V +VA 4.75 5 5.25 +VA Supply current(8) fs = 2 MHz 35 40 mA PD Power dissipation(8) fs = 2 MHz 175 200 mW TEMPERATURE RANGE TA Operating free-air –40 85 °C (7) Can vary ±20% (8) This includes only +VA current. +VBD current is typically 1 mA with 5-pF load capacitance on output pins. 4 |
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