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NTE2062 Datasheet(PDF) 2 Page - NTE Electronics

Part No. NTE2062
Description  Integrated Circuit PMOS Digital Alarm Clock
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Maker  NTE [NTE Electronics]
Homepage  http://www.nteinc.com
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Electrical Characteristics: (VDD = –12V, TA = +25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Input “HIGH” Level Current
IIH
VIN = VSS, 50/60Hz
10
µA
VIN = VDD, Input Pins other than 50/60Hz
20
µA
Input “LOW” Level Current
IIL
VIN = VDD, 50/60Hz
10
µA
VIN = VDD, Input Pins other than 50/60Hz
10
µA
Output “HIGH” Level Current
IOH
Alarm Out, Sleep Out, VOH = VSS–1V
5
mA
10’s Hr ag & de (24Hr Mode), VOUT =
VSS–1V
36
mA
Segment Outputs other than above,
VOUT = VSS–1V
18
mA
Output Leakage Current
IOF
Alarm Out, Sleep Out, VOUT = VDD
10
µA
10’s Hr ag & de (24Hr Mode), VOUT = VDD
20
µA
Segment Outputs other than above,
VOUT = VDD
20
µA
Power Failure Detect Voltage
VDD
–7.5
–5.0
V
Current Dissipation
ICC
Output: OFF, Input with Pull–Down
Resistor: Open
5
7
mA
Stability of Oscillator for Backup
FS
Typical value, 900Hz, VDD = –9V ±10%
–10
+10
%
Accuracy of Oscillator for Backup
FA
Typical value, 900Hz, VDD = –9V ±10%
–10
+10
%
Operation Description:
50Hz/60Hz Input:
The On–Chip Schmitt Trigger circuit allows a simple RC filter at the input to remove possible line volt-
age transients. An internal pull–up resistor is provided.
CR Input: (Note 1)
When AC power–down occurs, the time counter enters the “hold” mode and the on–chip clock oscilla-
tor starts operating immediately. If there is no input at “50/60Hz input” during 3–clock period, this oscil-
lator controls the time counter advance instead of “50/60Hz input”. The values of CR determine the
frequency of the on–chip clock oscillator. All segment outputs are off during backup operation. If the
backup OSC is used at the power–down mode, “50/60Hz input” must be open or at VSS level.
50/60Hz Select Input:
Connecting “50/60Hz select” to VSS enables 50Hz operation. For 60Hz operating, “50/60Hz select”
is left unconnected: Pull–down to VDD is provided by the internal pull–down resistor.
Display Mode Select Input (Alarm Display/Sleep Display):
The internal pull–down resistor allows the use of 2 SPST (single–pole single–throw) switches to select
4 display modes listed in Table 1.
Table 1. Display Mode
Select Input
Alarm
Sleep
Display Mode
Digit No.1
Digit No. 2
Digit No. 3
Digit No. 4
N.C.
N.C.
Time Display
10’s Hour, AM/PM
Hour
10’s Minute
Minute
VSS
N.C.
Alarm Display
10’s Hour, AM/PM
Hour
10’s Minute
Minute
N.C.
VSS
Sleep Display
Blanked
Hour
10’s Minute
Minute
VSS
VSS
Seconds Display
Blanked
Minute
10’s Second
Second
Note 1. If VSS is applied to 2 input of “alarm display” and “sleep display” simultaneously, the seconds
display mode is entered.




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