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PMV60EN Datasheet(PDF) 3 Page - NXP Semiconductors |
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PMV60EN Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 12 page Philips Semiconductors PMV60EN µTrenchMOS™ enhanced logic level FET Product data Rev. 01 — 15 January 2003 3 of 12 9397 750 10895 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Fig 1. Normalized total power dissipation as a function of solder point temperature. Fig 2. Normalized continuous drain current as a function of solder point temperature. Tsp =25 °C; IDM is single pulse Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 03aa17 0 40 80 120 0 50 100 150 200 (%) Tsp (°C) Pder 03aa25 0 40 80 120 0 50 100 150 200 Tsp (°C) Ider (%) P der P tot P tot 25 C ° () ----------------------- 100% × = I der I D I D25 C ° () ------------------- 100% × = 03ak69 10-2 10-1 1 10 102 10-1 1 10 102 VDS (V) ID (A) DC 10 ms Limit RDSon = VDS/ID 1 ms tp = 10 µs 100 ms 100 µs |
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