IDT72T40108L10BB datasheet(11/52 Pages) IDT

Part #	IDT72T40108L10BB

Description	2.5 VOLT HIGH-SPEED TeraSync DDR/SDR FIFO 40-BIT CONFIGURATION

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Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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11 / 52 page

11

COMMERCIAL AND INDUSTRIAL

TEMPERATURE RANGES

IDT72T4088/98/108/118 2.5V HIGH-SPEED TeraSync™ DDR/SDR FIFO 40-BIT

CONFIGURATION 16,384 x 40, 32,768 x 40, 65,536 x 40 and 131,072 x 40

Input Pulse Levels

0.25 to 1.25V

Input Rise/Fall Times

0.4ns

Input Timing Reference Levels

0.75

OutputReferenceLevels

VDDQ/2

HSTL

1.5V AC TEST CONDITIONS

Figure 2b. Lumped Capacitive Load, Typical Derating

AC TEST LOADS

Figure 2a. AC Test Load

Input Pulse Levels

0.4 to 1.4V

Input Rise/Fall Times

0.4ns

Input Timing Reference Levels

0.9

OutputReferenceLevels

VDDQ/2

EXTENDED HSTL

1.8V AC TEST CONDITIONS

Input Pulse Levels

GND to 2.5V

Input Rise/Fall Times

1ns

Input Timing Reference Levels

VCC/2

OutputReferenceLevels

VDDQ/2

2.5V LVTTL

2.5V AC TEST CONDITIONS

NOTE:

1. VDDQ = 1.5V±.

NOTE:

1. VDDQ = 1.8V±.

NOTE:

1. For LVTTL VCC = VDDQ.

5995 drw04

50

Ω

VDDQ/2

I/O

Z0 = 50

Ω

5995 drw04a

6

5

4

3

2

1

20 30 50

80 100

200

Capacitance (pF)

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IDT72T40108L10BB Datasheet(PDF) 11 Page - Integrated Device Technology

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