AFE1230

8

SBWS015A

TABLE IV. tx Data Structure.

TABLE V. tx Data Format.

BIT

DESCRIPTION

BIT STATE

OUTPUT STATE

47-32

tx D/A Converter Word 1

XXXX

16-Bit Binary Two's Complement Word to tx D/A Converter (MSB First)

31

Power Control

0

Normal Power, Any Speed

1

Low Power, Low Speed (< 1/2 Full Word Rate)

30

0

Reserved for Future Use

29-28

tx Cutoff Frequency Control

00

0.25x Word Rate

01

0.38x Word Rate

10

0.5x Word Rate

11

Not Used

27

tx Filter Order

0

Fifth-Order Butterworth

1

Seventh-Order Butterworth

26-25

tx Power Backoff

00

Normal Transient Power

01

Normal Transient Power –6dB

10

Normal Transient Power –12dB

11

Normal Transient Power –18dB

24

rx Cutoff Frequency Control

0

0.25x Word Rate

1

0.5x Word Rate

23-8

tx D/A Converter Word 2

XXXX

16-Bit Binary Two's Complement Word to tx D/A Converter (MSB First)

7-6

00

Reserved for Future Use

5-3

rx Gain Settings

000

rx Gain = 0dB

001

rx Gain = 3dB

010

rx Gain = 6dB

011

rx Gain = 9dB

100

rx Gain = 12dB

101

rx Gain = 15dB

110

rx Gain = 18dB

111

rx Gain = 21dB

2-1

Loop-Back Control

00

Normal Operation

01

Loop-Back Mode Digital, tx Data to rx Data

10

11

0

0

Reserved

NOTE: (1) Reserved Bits must be set to 0.

16

MSB

11

2

1

1

2

tx Power Backoff

rx Cutoff Frequency

tx Filter Order

tx Cutoff Frequency

Spare

Loopback

Spare

rx Gain

Spare

tx DAC Word 2

Low Power

tx DAC Word 1

16

2

3

2

1