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MAX1512ETA Datasheet(PDF) 11 Page - Maxim Integrated Products |
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MAX1512ETA Datasheet(HTML) 11 Page - Maxim Integrated Products |
11 / 12 page Applications Information The VCOM adjustment and the EEPROM programming must be performed with an external programming cir- cuit. Refer to the MAX1512 evaluation kit for a complete programming circuit solution. Use a circuit similar to the conceptual diagram shown in Figure 8 to drive CTL. The accuracy of the program- ming voltage (VPP) is critical for proper MAX1512 data retention. The use of a comparator is recommended to verify the correct programming voltage has been reached. A complete design example of a CTL pro- gramming circuit is presented in the MAX1512 evalua- tion kit data sheet. Electrostatic Discharge (CTL) The CTL pin is exposed at the LCD panel connector and is subject to electrostatic discharge (ESD). Often an RC filter is used to improve an input’s resilience to ESD. If a filter is added between the LCD panel connector and CTL, ensure that the RC time constant is short enough to avoid interfering with CTL pulses or the EEPROM pro- gramming timing. An RC time constant less than 200µs does not interfere with EEPROM programming. Leakage Current (CTL) The CTL pin is internally biased to VDD / 2, but it is sen- sitive to leakage currents above 0.1µA. When CTL is not driven, avoid leakage currents around the CTL pin. Otherwise, reinforce the VDD / 2 set point with an exter- nal resistive voltage-divider. Layout Information Use the following guidelines for good layout: • Place the VCOM buffer and the R1/R2 voltage- divider close to the OUT pin (Figure 1). Keep the VCOM buffer and the R1/R2 voltage-divider close to each other. • Place RSET close to SET. • In noisy environments, bypass capacitors may be desired on VDD and/or VAVDD. Keep any bypass capacitors close to the IC with short connections to the pins. Refer to the MAX1512 evaluation kit for an example of proper board layout. EEPROM-Programmable TFT VCOM Calibrator ______________________________________________________________________________________ 11 DAC 0 TO 2.5V µC USER INTERFACE CTL MAX1512 REF 0 TO 15.5V VPP VERIFY Figure 8. Conceptual Programming Circuit |
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