AD73322L_17 datasheet(27/49 Pages) AD

Part #	AD73322L

Description	Low Cost, Low Power CMOS General-Purpose Dual Analog Front

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AD73322L

Rev. A | Page 26 of 48

ANALOG LOOP-BACK MODE

In analog loop-back mode, the differential DAC output is

connected, via a loop-back switch, to the ADC input, as shown

in Figure 22. This mode allows the ADC channel to check

functionality of the DAC channel as the reconstructed output

signal can be monitored using the ADC as a sampler. analog

loop-back is enabled by setting the ALB bit (CRF:7).

Note that analog loop-back can only be enabled if the Analog

Gain Tap is powered down (CRC:1 = 0).

INVERTING

OP AMPS

ANALOG GAIN

TAP POWERED

DOWN

ANALOG

LOOP-BACK

SELECT

INVERT

SINGLE-

ENDED

ENABLE

CONTINUOUS

TIME

LOW-PASS

FILTER

VREF

VFBN1

VINN1

VINP1

VFBP1

VOUTP1

VOUTN1

AD73322L

+6/–15dB

PGA

0/38dB

PGA

GAIN

±1

REFOUT

REFCAP

REFERENCE

VREF

Figure 22. Analog Loop-Back Connectivity

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