THS1040

SLAS290C − OCTOBER 2001 − REVISED OCTOBER 2004

3

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Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

AGND

1, 19

I

Analog ground

AIN+

27

I

Positive analog input

AIN−

25

I

Negative analog input

AVDD

28

I

Analog supply

BIASREF

21

O

When the MODE pin is at AVDD, a buffered AVDD/2 is present at this pin that can be used by external input

biasing circuits. The output is high impedance when MODE is AGND or AVDD/2.

CLK

15

I

Clock input

DGND

14

I

Digital ground

DVDD

2

I

Digital supply

D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

3

4

5

6

7

8

9

10

11

12

O

Digital data bit 0 (LSB)

Digital data bit 1

Digital data bit 2

Digital data bit 3

Digital data bit 4

Digital data bit 5

Digital data bit 6

Digital data bit 7

Digital data bit 8

Digital data bit 9 (MSB)

MODE

23

I

Operating mode select (AGND, AVDD/2, or AVDD)

OE

16

I

High to 3-state the data bus, low to enable the data bus

OVR

13

O

Out-of-range indicator

REFB

24

I/O

Bottom ADC reference voltage

REFSENSE

18

I

VREF mode control

REFT

22

I/O

Top ADC reference voltage

STBY

17

I

Drive high to power-down the THS1040

TEST

20

I

Production test pin. Tie to DVDD or DGND

VREF

26

I/O

Internal or external reference