TLV320AIC24IPFBR datasheet(5/53 Pages) TI

Part #	TLV320AIC24IPFBR

Description	Layout and Grounding Guidelines for TLV320AIC2x

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Manufacturer	TI [Texas Instruments]

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Electrical Characteristics

Absolute Maximum Ratings

(1)

Recommended Operating Conditions

TLV320AIC20, TLV320AIC21

TLV320AIC24, TLV320AIC25

TLV320AIC20K, TLV320AIC24K

SLAS363D – MARCH 2002 – REVISED APRIL 2005

All specifications are common across the AIC20, AIC21, AIC24, AIC25, AIC20K, and AIC24K except where

explicitly stated.

AIC20/21/24/25: Over Recommended Operating Free-Air Temperature Range, AVDD = 3.3 V, DVDD = 1.8 V,

IOVDD = 3.3 V (Unless Otherwise Noted)

AIC20K/24K: Over Recommended Operating Free-Air Temperature Range, AVDD = 3.3 V, DVDD = 1.8 V,

IOVDD = 3.3 V (Unless Otherwise Noted)

over Operating Free-Air Temperature Range (Unless Otherwise Noted)

TLV320AIC2x

VCC

Supply voltage range:

DVDD(2)

-0.3 V to 2.25 V

AVDD, IOVDD, DRVDD(2)

-0.3 V to 4 V

VO

Output voltage range, all digital output signals

-0.3 V to IOVDD + 0.3 V

VI

Input voltage range, all digital input signals

-0.3 V to IOVDD + 0.3 V

TA

Operating free-air temperature range

-40°C to 85°C

Tstg

Storage temperature range

-65°C to 150°C

Case temperature for 10 seconds: package

260°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltage values are with respect to VSS.

MIN

NOM

MAX

UNIT

Analog, AVDD

2.7

3.3

3.6

V

Analog output driver, DRVDD(1)

2.7

3.3

3.6

V

VCC

Supply voltage

Digital core, DVDD

1.65

1.8

1.95

V

Digital I/O, IOVDD

1.1

3.3

3.6

V

Analog single-ended peak-to-peak input voltage, VI(analog)

2

V

Between LINEO+ and LINEO- (differential)

600

Between HDSO+ and HDSO- (differential)

150

RL

Output load resistance,

Ω

Between HNSO+ and HDSO- (differential)

150

Between SPKO+ and SPKO- (differential)

8

CL

Analog output load capacitance

20

pF

Digital output capacitance

20

pF

Master clock

100

MHz

ADC or DAC conversion rate

26

kHz

TA

Operating free-air temperature,

-40

85

°C

(1)

DRVDD should be kept at the same voltage as AVDD.

5

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