Electronic Components Datasheet Search |
|
AD9216BCPZ-65 Datasheet(PDF) 11 Page - Analog Devices |
|
AD9216BCPZ-65 Datasheet(HTML) 11 Page - Analog Devices |
11 / 41 page AD9216 Rev. A | Page 10 of 40 Pin No. Mnemonic Description 46 to 51, 54 to 57 D0_A (LSB) to D9_A (MSB) Channel A Data Output Bits. 59 OEB_A Output Enable for Channel A. Logic 0 enables Data Bus A. Logic 1 sets outputs to High-Z. 60 PDWN_A Power-Down Function Selection for Channel A. Logic 0 enables Channel A. Logic 1 powers down Channel A. (Outputs static, not High-Z.) 61 MUX_SELECT Data Multiplexed Mode. (See Data Format section for how to enable.) 62 SHARED_REF Shared Reference Control Bit. Low for independent reference mode; high for shared reference mode. 63 CLK_A Clock Input Pin for Channel A. 1 It is recommended that all ground pins (AGND and DRGND) be tied to a common ground plane. |
Similar Part No. - AD9216BCPZ-65 |
|
Similar Description - AD9216BCPZ-65 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |