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5962-86816012A Datasheet(PDF) 9 Page - Texas Instruments |
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5962-86816012A Datasheet(HTML) 9 Page - Texas Instruments |
9 / 20 page SN54HC595, SN74HC595 8BIT SHIFT REGISTERS WITH 3STATE OUTPUT REGISTERS SCLS041G − DECEMBER 1982 − REVISED FEBRUARY 2004 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION VOLTAGE WAVEFORMS SETUP AND HOLD AND INPUT RISE AND FALL TIMES VOLTAGE WAVEFORMS PULSE DURATIONS th tsu 50% 50% 50% 10% 10% 90% 90% VCC VCC 0 V 0 V tr tf Reference Input Data Input 50% High-Level Pulse 50% VCC 0 V 50% 50% VCC 0 V tw Low-Level Pulse VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES 50% 50% 50% 10% 10% 90% 90% VCC VOH VOL 0 V tr tf Input In-Phase Output 50% tPLH tPHL 50% 50% 10% 10% 90% 90% VOH VOL tr tf tPHL tPLH Out-of- Phase Output 50% 10% 90% VCC ≈VCC VOL 0 V Output Control (Low-Level Enabling) Output Waveform 1 (See Note B) 50% tPZL tPLZ VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS VOH ≈0 V 50% 50% tPZH tPHZ Output Waveform 2 (See Note B) ≈VCC Test Point From Output Under Test RL VCC S1 S2 LOAD CIRCUIT PARAMETER CL tPZH tpd or tt tdis ten tPZL tPHZ tPLZ 1 k Ω 1 k Ω 50 pF or 150 pF 50 pF Open Closed RL S1 Closed Open S2 Open Closed Closed Open 50 pF or 150 pF Open Open −− NOTES: A. CL includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. D. For clock inputs, fmax is measured when the input duty cycle is 50%. E. The outputs are measured one at a time, with one input transition per measurement. F. tPLZ and tPHZ are the same as tdis. G. tPZL and tPZH are the same as ten. H. tPLH and tPHL are the same as tpd. CL (see Note A) Figure 1. Load Circuit and Voltage Waveforms |
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