SN65LVDM1676, SN65LVDM1677

HIGHSPEED DIFFERENTIAL LINE TRANSCEIVERS

SLLS430B − NOVEMBER 2000 − REVISED OCTOBER 2004

9

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PARAMETER MEASUREMENT INFORMATION

Y

Z

VOD

Input

CL = 10 pF

(2 Places)

50

Ω ± 1 %

3 V

VCC/2

0 V

tpLH

tpHL

100%

80%

20%

0%

Input

Output

0 V

tf

tr

VOD(H)

VOD(L)

NOTE: All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 0.5 Mpps, pulse

width = 10

± 0.2 ns. CL includes instrumentation and fixture capacitance within 0,06 m of the D.U.T.

Figure 4. Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal

CL = 10 pF

(2 Places)

Y

Z

TX/RX

25

Ω ± 1% (2 Places)

1.2 V

tpZH

tpHZ

tpZL

tpLZ

3 V

VCC/2

0 V

≅ 1.4 V

1.25 V

1.2 V

≅ 1 V

1.2 V

1.15 V

TX/RX

VOY or VOZ

VOZ or VOY

VOY VOZ

0.8 V or 2 V

+

−

NOTE: All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 0.5 Mpps, pulse

width = 500

± 10 ns. CL includes instrumentation and fixture capacitance within 0,06 m of the D.U.T.

Figure 5. Enable and Disable Time Circuit and Definitions