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MT9V112 Datasheet(PDF) 9 Page - Micron Technology |
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MT9V112 Datasheet(HTML) 9 Page - Micron Technology |
9 / 58 page MT9V112 SOC VGA DIGITAL IMAGE SENSOR PRELIMINARY 09005aef8154a39d/09005aef8175e6cc Micron Technology, Inc., reserves the right to change products or specifications without notice. MT9V112_2.fm- Rev. A 1/05 EN 9 ©2004 Micron Technology, Inc. All rights reserved. Figure 4: 36-Ball ICSP Assignment A B C D E F Top View (Ball Down) 2 DOUT3 DGND DOUT2 DOUT VDDQ PIXCLK 3 DOUT5 DOUT4 DGND DGND STROBE SCLK 1 VDD DOUT0 DOUT1 DOUT SADDR VDD 4 DOUT7 DOUT6 DGND DGND STAND BY 6 VDD LINE VDD VAA AGND VAAPIX 5 CLKIN VDDQ FRAME TEST DGND SDATA _LSB0 _LSB1 RESET# _VALID _VALID _ENABLE Table 2: Ball Description BALL ASSIGNMENT NAME TYPE DESCRIPTION A5 CLKIN Input Master clock in sensor. E4 RESET# Input Active LOW: asynchronous reset. E1 SADDR Input Two-Wire Serial Interface Device ID selection 1:0xBA, 0:0x90. D5 TEST_ENABLE Input Tie to DGND for normal operation. (Manufacturing use only.) F3 SCLK Input Two-Wire Serial Interface Clock. F4 STANDBY Input Multifunctional signal to control device addressing, power-down, and state functions (covering output enable function). F5 SDATA Output Two-Wire Serial Interface Data I/O. B1, C1, C2, A2, B3, A3, B4, A4 DOUT(7:0) Output Pixel Data Output bit 0, DOUT(7) (most significant bit (MSB)), DOUT(0) (least significant bit (LSB)). D1 DOUT_LSB0 Output Sensor bypass mode output 0—typically left unconnected for normal SOC operation. D2 DOUT_LSB1 Output Sensor bypass mode output 1—typically left unconnected for normal SOC operation. C5 FRAME_VALID Output Active HIGH: FRAME_VALID; indicates active frame. B6 LINE_VALID Output Active HIGH: LINE_VALID, DATA_VALID; indicates active pixel. F2 PIXCLK Output Pixel clock output. E3 STROBE Output Active HIGH: strobe (Xenon) or turn on (LED) flash. E6 AGND Supply Analog ground. B2, C3, C4, D3, D4, E5 DGND Supply Core digital ground. |
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