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AD7616-P Datasheet(PDF) 9 Page - Analog Devices |
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AD7616-P Datasheet(HTML) 9 Page - Analog Devices |
9 / 47 page AD7616-P Data Sheet Rev. 0 | Page 8 of 46 Parallel Interface Timing Specifications Table 3. Parameter Min Typ Max Unit Description t CS_HIGH 20 ns CS high pulse width t RD_SETUP 0 ns CS falling edge to RD falling edge setup time t RD_HOLD 0 ns RD rising edge to CS rising edge hold time t RD_HIGH 20 ns RD high pulse width t RD_LOW 40 ns RD low pulse width t DOUT_SETUP 40 ns Data access time after falling edge of RD t DOUT_3STATE 16 ns CS rising edge to DBx high impedance t WR_SETUP 0 ns CS to WR setup time t WR_HIGH 20 ns WR high pulse width t WR_LOW 40 ns WR low pulse width t WR_HOLD 0 ns WR hold time t DIN_SETUP 12 ns Configuration data to WR setup time t DIN_HOLD 5 ns Configuration data to WR hold time t CONF_SETTLE 20 ns Configuration data settle time, WR rising edge to CONVST rising edge Figure 4. Parallel Read Timing Diagram Figure 5. Parallel Write Timing Diagram CONV B CONV A tRD_SETUP tDOUT_SETUP tRD_LOW tRD_HIGH tCS_HIGH tRD_HOLD tDOUT_3STATE CS RD BUSY DB0 TO DB15 CONVST WRITE REG 1 WRITE REG 2 tDIN_SETUP tDIN_HOLD tCONF_SETTLE tWR_HIGH tWR_SETUP tWR_HOLD tWR_LOW CS WR DB0 TO DB15 CONVST |
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