K4S51323PF-M(E)F

September 2004

1

Mobile-SDRAM

• 1.8V power supply.

• LVCMOS compatible with multiplexed address.

• Four banks operation.

• MRS cycle with address key programs.

-. CAS latency (1, 2 & 3).

-. Burst length (1, 2, 4, 8 & Full page).

-. Burst type (Sequential & Interleave).

• EMRS cycle with address key programs.

• All inputs are sampled at the positive going edge of the system

clock.

• Burst read single-bit write operation.

• Special Function Support.

-. PASR (Partial Array Self Refresh).

-. Internal TCSR (Temperature Compensated Self Refresh)

-. DS (Driver Strength)

• DQM for masking.

• Auto refresh.

• 64ms refresh period (8K cycle).

• Commercial Temperature Operation (-25

°C ~ 70°C).

• 2Chips DDP 90Balls FBGA( -MXXX -Pb, -EXXX -Pb Free).

FEATURES

The K4S51323PF is 536,870,912 bits synchronous high data

rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits,

fabricated with SAMSUNG’s high performance CMOS technol-

ogy. Synchronous design allows precise cycle control with the

use of system clock and I/O transactions are possible on every

clock cycle. Range of operating frequencies, programmable

burst lengths and programmable latencies allow the same

device to be useful for a variety of high bandwidth and high per-

formance memory system applications.

GENERAL DESCRIPTION

ORDERING INFORMATION

- M(E)F : Low Power, Commercial Temperature(-25

°C ~ 70°C)

Notes :

1. In case of 40MHz Frequency, CL1 can be supported.

2. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is

potentially at stake. Please contact to the memory marketing team in samsung electronics when considering the use of a product

contained herein for any specific purpose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use.

Part No.

Max Freq.

Interface

Package

K4S51323PF-M(E)F75

133MHz(CL=3),83MHz(CL=2)

LVCMOS

90 FBGA Pb

(Pb Free)

K4S51323PF-M(E)F90

111MHz(CL=3),83MHz(CL=2)

K4S51323PF-M(E)F1L

4M x 32Bit x 4 Banks Mobile-SDRAM

Address configuration

Organization

Bank

Row

Column Address

16Mx32

BA0,BA1

A0 - A12

A0 - A8