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UCC5350 Datasheet(PDF) 6 Page - Texas Instruments |
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UCC5350 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 35 page 6 UCC5350SB SLLSF39 – SEPTEMBER 2017 www.ti.com Product Folder Links: UCC5350SB Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Care must be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal in certain cases. Techniques such as inserting grooves and ribs on the PCB are used to help increase these specifications. (2) This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits. (3) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier (4) Apparent charge is electrical discharge caused by a partial discharge (pd). (5) All pins on each side of the barrier are tied together, creating a two-pin device. 6.6 Insulation Specifications Over operating free air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VALUE UNIT CLR External Clearance(1) Shortest pin–to-pin distance through air 4 mm CPG External Creepage(1) Shortest pin–to-pin distance across the package surface 4 mm DTI Distance through the insulation Minimum internal gap (internal clearance) > 21 µm CTI Comparative tracking index DIN EN 60112 (VDE 0303–11); IEC 60112 > 600 V Material Group According to IEC 60664–1 I Overvoltage category per IEC 60664-1 Rated mains voltage ≤ 150 VRMS I-IV Rated mains voltage ≤ 300 VRMS I-III DIN V VDE 0884–11 (VDE V 0884–11): 2017–01(2) VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 990 VPK VIOWM Maximum isolation working voltage AC voltage (sine wave) 700 VRMS 990 VDC DC voltage VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60 s (qualification test) t = 1 s (100% production) 4242 VPK VIOSM Maximum surge isolation voltage(3) Test method per IEC 60065, 1.2/50-µs waveform, VTEST = 1.3 × VIOSM (qualification) 4242 VPK qpd Apparent charge(4) Method a: After I/O safety test subgroup 2/3, Vini = VIOTM, tini = 60 s Vpd(m) = 1.2 × VIORM, tm = 10 s ≤ 5 pC Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.3 × VIORM, tm = 10 s ≤ 5 Method b1: At routine test (100% production) and preconditioning (type test), Vini = VIOTM, tini = 1 s; Vpd(m) = 1.5 × VIORM, tm = 1 s ≤ 5 CIO Barrier capacitance, input to output(5) VIO = 0.4 x sin(2πft), f = 1 MHz 1.2 pF RIO Isolation resistance, input to output(5) VIO = 500 V, TA = 25°C > 1012 Ω VIO = 500 V at 100°C ≤ TA ≤ 125°C > 1011 VIO = 500 V, TS = 150°C > 109 Pollution degree 2 Climatic category 40/125/21 UL 1577 VISO Withstand isolation voltage VTEST = VISO= 3000 VRMS, t = 60 s (qualification); VTEST = 1.2 × VISO = 3600 VRMS , t = 1 s (100% production) 3000 VRMS |
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