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TPS565201 Datasheet(PDF) 11 Page - Texas Instruments |
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TPS565201 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 25 page 11 TPS565201 www.ti.com SLVSE71 – SEPTEMBER 2017 Product Folder Links: TPS565201 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Feature Description (continued) 7.3.4 Current Protection The output over-current limit (OCL) is implemented using a cycle-by-cycle valley detect control circuit. The inductor current is monitored during the OFF state by measuring the low-side FET drain to source voltage, which is proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated. During the on time of the high-side FET switch, the switch current increases at a linear rate determined by VIN, VOUT, and the output inductor value. During the on time of the low-side FET switch, this current decreases linearly. The average value of the switch current is the load current IOUT. If the monitored current is above the OCL level, the converter maintains low-side FET on and delays the creation of a new set pulse, even the voltage feedback loop requires one, until the current level becomes OCL level or lower. In subsequent switching cycles, the on-time is set to a fixed value and the current is monitored in the same manner. There are some important considerations for this type of over-current protection. The load current is higher than the over-current threshold by one half of the peak-to-peak inductor ripple current. Also, when the current is being limited, the output voltage tends to fall as the demanded load current may be higher than the current available from the converter. This may cause the output voltage to fall. When the VFB voltage falls below the UVP threshold voltage, the UVP comparator detects it. And then, the device shuts down after the UVP delay time (typically 24 µs) and re-starts after the hiccup time (typically 14.9 ms). When the over current condition is removed, the output voltage returns to the regulated value. 7.3.5 Undervoltage Lockout (UVLO) Protection UVLO protection monitors input voltage. When the voltage is lower than UVLO threshold voltage, the device is shut off. This protection is non-latching. 7.3.6 Thermal Shutdown The device monitors the temperature of itself. If the temperature exceeds the threshold value (typically 172°C), the device is shut off. This is a non-latch protection. 7.4 Device Functional Modes 7.4.1 Normal Operation When the input voltage is above the UVLO threshold and the EN voltage is above the enable threshold, the TPS565201 operates in the normal switching mode. Normal continuous conduction mode (CCM) occurs when the minimum switch current is above 0 A. In CCM, the TPS565201 operates at a quasi-fixed frequency of 500 kHz. 7.4.2 Eco-mode™ Operation When the TPS565201 is in the normal CCM operating mode and the switch current falls to 0 A, the TPS565201 begins operating in pulse skipping eco-mode. Each switching cycle is followed by a period of energy saving sleep time. The sleep time ends when the VFB voltage falls below the eco-mode threshold voltage. As the output current decreases, the perceived time between switching pulses increases. 7.4.3 Standby Operation When the TPS565201 is operating in either normal CCM or Eco-mode™, it may be placed in standby by asserting the EN pin low. |
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