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TPS63710DRRR Datasheet(PDF) 3 Page - Texas Instruments |
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TPS63710DRRR Datasheet(HTML) 3 Page - Texas Instruments |
3 / 36 page 10 8 12 4 5 3 11 9 2 1 6 7 Exposed Thermal Pad 3 TPS63710 www.ti.com SLVSD44 – SEPTEMBER 2017 Product Folder Links: TPS63710 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 5 Pin Configuration and Functions DRR Package 12-Pin WSON Top View Table 1. Pin Functions Pin I/O Description Name No. VIN 12 I Power supply Input. Connect the input capacitor and supply voltage to this pin. VAUX 1 O Connection for the output capacitor of the internal voltage regulator. VAUX can be loaded externally with up to 100uA. Do not use this pin for any pulsed load to not couple noise into the internal supply. GND 10, 9 Ground Connection CP 11 O Connect a capacitor from this pin to SW. SW 8 O Connect a capacitor from this pin to CP and the inductor from this pin to the output. FB 5 I Feedback pin for the voltage divider. VOUT 7 I Output voltage sense pin. CAP 6 O Reference system bypass capacitor connection. Do not tie anything other than a capacitor to GND to this pin. Keep any noise sources away from this pin. The capacitor connected to this pin forms a low-pass filter with an internal filter resistor and also defines the soft-start time. VREF 4 O Reference voltage output. Connect a voltage divider between this pin, FB and GND to set the output voltage. Do not connect any other circuitry to this pin. EN 2 I Enable pin (EN=low: disabled; EN=high: enabled) PG 3 O Open drain power good output. Connect with a pull-up resistor to a positive voltage up to 5.5 V. If not used, leave open or connect to GND. Exposed Thermal Pad - - The thermal pad must be tied to GND. The pad must be soldered to a GND plane to achieve an appropriate thermal resistance and for mechanical reliability. |
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