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TPS63710 Datasheet(PDF) 6 Page - Texas Instruments

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Part # TPS63710
Description  Low Noise Synchronous Inverting Buck Converter
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS63710 Datasheet(HTML) 6 Page - Texas Instruments

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6
TPS63710
SLVSD44 – SEPTEMBER 2017
www.ti.com
Product Folder Links: TPS63710
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
(1)
This specification applies after there has been a high to low transition on EN. If EN is low while the supply voltage is applied, the
shutdown current can be up to 90µA.
(2)
Please see the application section for how to set the output voltage.
(3)
Tolerance of VFB voltage and error of gain stage - see also "Low Noise Reference System"
6.5 Electrical Characteristics
TJ = –40°C to 125°C, over recommended input voltage range. Typical values are at VIN = 5 V and TJ = 25°C (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
I(Q)
Quiescent supply current
IOUT = 0mA, EN = high
15
mA
ISD
Shutdown supply current
EN = low, TJ = -40°C to 85°C
(1)
5
25
μA
ISD
Shutdown supply current
EN = low, TJ = -40°C to 125°C
(1)
55
μA
VUVLO
Undervoltage lockout threshold
VIN falling, detected at VAUX
2.55
2.6
2.7
V
Undervoltage lockout hysteresis
VIN rising, detected at VAUX
250
350
mV
TSD
Thermal shutdown temperature
Junction temperature rising
160
°C
Thermal shutdown hysteresis
Junction temperature falling
20
°C
CONTROL (EN, PG)
VIH
High level input voltage for EN
1
14
V
VIL
Low level input voltage for EN
0.4
V
IIN
Input current for EN
EN = high
0.01
0.1
μA
RIN
Input resistance for EN
EN = low
400
PG de-glitch time
rising or falling
10
µs
VOL_PG
PG output low voltage
IPG = 1 mA
0.07
0.3
V
ILKG_PG
Input leakage current (PG)
VPG = 5 V
100
nA
VVAUX
Voltage at VAUX
VIN ≥ 5 V, IVAUX = 100 µA
4.6
V
IVAUX
Current drawn from VAUX
0
100
μA
POWER SWITCH
ILIM
Switch current limit (LSD)
4 V
≤ VIN < 14 V, duty cycle ≤ 70%
1.4
2.1
3
A
ILIM
Switch current limit (LSD)
3.1 V < VIN < 4 V, duty cycle ≤ 70%
0.8
A
RDS(ON)
Switch on-resistance
HSD switch, VIN ≥ 5 V
80
130
m
LSD switch, VIN ≥ 5 V
120
190
RECT switch, VIN ≥ 5 V
40
80
DMAX
Maximum duty cycle
at SW pin
70%
ton,min
Minimum on-time
130
ns
fS
Switching frequency
1400
1500
1600
kHz
OUTPUT
VOUT
Output voltage range
|VOUT| < 0.7 x VIN
-5.5
-1
V
VFB
FB regulation voltage
-0.7(2)
V
Output voltage tolerance (3)
for VOUT ≤ –1.8 V
-1.5%
1.5%
Output voltage tolerance (3)
for –1.8 V < VOUT ≤ –1 V
-2%
1.5%
IFB
Feedback input bias current
VFB = –0.7 V
2
100
nA
RDIS
Discharge resistance from pin VOUT
to GND
EN = low
100
Ω
Line regulation
0.05
%/A
Load regulation
0.02
%/V
tdelay
Start-up delay time from EN = high to
start switching
with CCP = 10 µF
5
ms
tramp
Ramp time from start switching until
device has reached 95% of its
nominal output voltage
CCAP = 47 nF, VOUT = -1.8 V, device
not in current limit during start-up
1
ms
Iramp
Soft-start current into CCAP
55
100
145
µA


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