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TLV71128518DDSET Datasheet(PDF) 5 Page - Texas Instruments |
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TLV71128518DDSET Datasheet(HTML) 5 Page - Texas Instruments |
5 / 33 page OUT1 OUT2 GND 6 5 4 EN1 IN EN2 1 2 3 TLV710 Series TLV711 Series www.ti.com SBVS142A – JULY 2010 – REVISED AUGUST 2010 PIN CONFIGURATION DSE PACKAGE 1.5mm x 1.5mm SON-6 (TOP VIEW) PIN DESCRIPTIONS NAME PIN NO. DESCRIPTION Enable pin for regulator 1. Driving EN1 over 0.9V turns on regulator 1. Driving EN below 0.4V puts regulator EN1 1 1 into shutdown mode. Input pin. A small capacitor is needed from this pin to ground to assure stability. See Input and Output IN 2 Capacitor Requirements in the Application Information section for more details. Enable pin for regulator 2. Driving EN2 over 0.9V turns on regulator 2. Driving EN2 below 0.4V puts EN2 3 regulator2 into shutdown mode. GND 4 Ground pin. Regulated output voltage pin. A small 1mF ceramic capacitor is needed from this pin to ground to assure OUT2 5 stability. See Input and Output Capacitor Requirements in the Application Information section for more details. Regulated output voltage pin. A small 1mF ceramic capacitor is needed from this pin to ground to assure OUT1 6 stability. See Input and Output Capacitor Requirements in the Application Information section for more details. Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 5 |
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