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CY7C0251-55AC Datasheet(PDF) 4 Page - Cypress Semiconductor

Part # CY7C0251-55AC
Description  4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C0251-55AC Datasheet(HTML) 4 Page - Cypress Semiconductor

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CY7C024/0241
CY7C025/0251
Document #: 38-06035 Rev. *B
Page 4 of 20
Pin Definitions
Left Port
Right Port
Description
CEL
CER
Chip Enable
R/WL
R/WR
Read/Write Enable
OEL
OER
Output Enable
A0L–A11/12L
A0R–A11/12R
Address
I/O0L–I/O15/17L
I/O0R–I/O15/17R
Data Bus Input/Output
SEML
SEMR
Semaphore Enable
UBL
UBR
Upper Byte Select
LBL
LBR
Lower Byte Select
INTL
INTR
Interrupt Flag
BUSYL
BUSYR
Busy Flag
M/S
Master or Slave Select
VCC
Power
GND
Ground
Pin Configurations (continued)
Top View
100-Pin TQFP
100 99
97
98
96
2
3
1
42
41
59
60
61
12
13
15
14
16
4
5
40
39
95 94
17
26
9
10
8
7
6
11
27 28
30
29
31 32
35
34
36 37 38
33
67
66
64
65
63
62
68
69
70
75
73
74
72
71
89 88
86
87
85
93 92
84
NC
NC
NC
NC
A5L
A4L
INTL
A2L
A0L
BUSYL
GND
INTR
A0R
A1L
NC
NC
I/O11L
I/O12L
I/O16L
VCC
GND
I/O1R
I/O2R
VCC
90
91
A3L
M/S
BUSYR
I/O15L
GND
I/O13L
I/O14L
A1R
A2R
A3R
A4R
NC
NC
NC
NC
I/O3R
I/O4R
I/O5R
I/O6R
NC
NC
18
19
20
21
22
23
24
25
83 82 81 80 79 78 77 76
58
57
56
55
54
53
52
51
43 44 45 46 47 48 49 50
7C024–3
I/O0R
CY7C0241/0251
I/O8L
I/O17L
I/O8R
I/O17R
Selection Guide
7C024/0241–15
7C025/0251–15
7C024/0241–25
7C025/0251–25
7C024/0241–35
7C025/0251–35
7C024/0241–55
7C025/0251–55
Maximum Access Time (ns)
15
25
35
55
Typical Operating Current (mA)
190
170
160
150
Typical Standby Current for ISB1 (mA)
50
40
30
20


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