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EC25C256NM1GR Datasheet(PDF) 1 Page - E-CMOS Corporation

Part # EC25C256NM1GR
Description  256Kbits SPI Serial EEPROM
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Manufacturer  E-CMOS [E-CMOS Corporation]
Direct Link  http://www.ecmos.com.tw/
Logo E-CMOS - E-CMOS Corporation

EC25C256NM1GR Datasheet(HTML) 1 Page - E-CMOS Corporation

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E-CMOS Corp. (www.ecmos.com.tw)
Page 1 of 18
4J09N-Rev.F001
EC25C256
256Kbits SPI Serial EEPROM
General Description
The
EC25C256
is
an
industrial
standard
electrically erasable programmable read only
memory
(EEPROM)
Product
that
utilizes
standard Serial Peripheral Interface (SPI) for
communications.
The
EC25C256
contains
a
memory array of 256K bits (32,768x 8), which is
organized in 64 bytes per page.
This EEPROM operates in a wide voltage range
from 1.7V to 5.5V,which fits most application.
The device
provides low-power operations and
low standby current. The product is offered in
Lead-free, RoHS, halogen free or Green package.
The available package types are 8-pin SOP,
TSSOP and UDFN.
The functionalities of the EC25C256 are optimized
for
most
applications,
such
as
consumer
electronics,
wireless,
telecommunication,
industrial, medical ,instrumentation, commercial
and others, where low-power and
low-voltage
Are vital. This product has a compatible SPI
interface: Chip-Select ( CS ), Serial Data In (SI),
Serial Data Out (SO) and Serial Clock (SCK)
for
high-speed communication. Furthermore,
a Hold feature via HOLD pin
allows the device
entering
into
a
suspended
state
whenever
necessary
and
resuming
the
communication
without re-initializing the serial sequence. A
Status
Register
facilitates
a
flexible
write
protection
mechanism
and
device
Status
monitoring.
The EC25C256 also offers an additional page, named the
Identification Page(64 bytes)
which
can be written and
(later) permanently locked
in
Read-only mode. This
Identification Page offers
flexibility in the application
board production line, as the Identification Page can be
used to store unique
identification parameters
and/or parameters specific to the production line.
In order to refrain the state machine from entering into a
Wrong state during power-up sequence or a power
toggle off-on condition, a power on reset circuit is
implemented. During power-up, the device does not
respond to any instructions until the supply voltage
(VCC)has reached an acceptable stable level above the
reset threshold voltage. Once VCC passes the power on
reset threshold, the device is reset and enters into
Standby mode. This should also avoid any inadvertent
Write operations during power-up stage. During power-
down process, the device will enter into standby mode,
once VCC drops below the power on reset threshold
voltage. In addition, the device will be in standby mode
after receiving the Stop command, provided that no
internal write operation is in progress. Nevertheless,
it is illegal to send a command unless the VCC is within its
operating level.


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