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AT75C310 Datasheet(PDF) 5 Page - ATMEL Corporation |
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AT75C310 Datasheet(HTML) 5 Page - ATMEL Corporation |
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5 / 17 page  AT75C310 5 Figure 4. DRAM Write Cycle (Single Write) Table 3. DRAM Write Cycle (Single Write) Timings Symbol Parameter Min (ns) Max (ns) t RC Read or Write Cycle Time 125.0 – tRAS RAS Pulse Width 82.0 – t RP RAS Precharge Time 42.0 – t CSH CAS Hold Time 61.0 – tCRP CAS to RAS Precharge Time 49.0 – t RCD RAS to CAS Delay Time 41.0 – t RSH RAS Hold Time 29.0 – tCAS CAS Pulse Width 20.0 – t ASR Row Address Setup Time 1.5 – t RAH Row Address Hold Time 22.0 – tASC Column Address Setup Time 15.0 – t CAH Column Address Hold Time 21.0 – t WCS Write Command Setup Time 18.0 – tWCH Write Command Hold Time 21.0 – t DS Data Setup Time 8.0 – t DH Data Hold Time 21.0 – tRC tRP tRAS tRCD tRSH tCSH tCRP tCAS tCAH tASC tRAH tASR D NDWE A NCASx NRASx tWCS tWCH tDS tDH |
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