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A8237 Datasheet(PDF) 4 Page - Altera Corporation

Part No. A8237
Description  PROGRAMMABLE DMA CONTROLLER
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Maker  ALTERA [Altera Corporation]
Homepage  http://www.altera.com
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8
Altera Corporation
a8237 Programmable DMA Controller Data Sheet
Functional
Description
Figure 2 shows a block diagram of the a8237 MegaCore function.
Figure 2. a8237 Block Diagram
Programming
Several registers in the a8237 must be programmed before DMA cycles
can be executed. However, to avoid unpredictable behavior, disable the
DMA cycles during programming by setting bit 2 of the command
register.
ncs
neopin
niorin
niowin
ready
reset
ain[3..0]
hrq, aen, adstb
niorout, niowout
nmemr, nmemw
dben, dmaenable, neopout
aout[7..0]
aout[15..8]
to dbout[7..0]
DMA Address Registers
Channel 0
Base
Temporary
Register
Channel 1
Base
Channel 2
Base
Channel 3
Base
Channel 0
Current
Channel 1
Current
Channel 2
Current
Channel 3
Current
Other
Registers
to
Control
Logic
DMA Word Count Registers
Channel 0
Base
Temporary
Register
Channel 1
Base
Channel 2
Base
Channel 3
Base
Channel 0
Current
Channel 1
Current
Channel 2
Current
Channel 3
Current
aout[15..8]
dbout[7..0]
dreq[3..0]
dack[3..0]
Internal
Control
Signals
Control
Logic
(State Machine
and Decoder)
Status
Register
Request
Register
Mask
Register
Temporary
Register
Command
Register
Request
Priority
Encoder
Data
Output
Multiplexer
dbin[7..0]
hlda
clk
Mode
Registers
Channel 0
Channel 1
Channel 2
Channel 3




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