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X9530B15I Datasheet(PDF) 2 Page - Xicor Inc. |
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X9530B15I Datasheet(HTML) 2 Page - Xicor Inc. |
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2 / 30 page  X9530 Characteristics subject to change without notice. 2 of 30 REV 3.7 8/26/04 www.xicor.com PIN CONFIGURATION DEVICE DESCRIPTION The X9530 combines two Programmable Current Generators, and integrated EEPROM with Block Lock™ protection, in one package. The Programmable Current Generators are ideal for use in fiber optic Modulation Current require temperature control. The combination of the X9530 functionality and Xicor’s Chip-Scale package lowers system cost, increases reliability, and reduces board space requirements. Two on-chip Programmable Current Generators may be independently programmed to either sink or source current. The maximum current generated is determined by using an externally connected programming resistor, or by selecting one of three predefined values. Both current generators have a maximum output of ±1.6 mA, and may be controlled to an absolute resolution of 0.39% (256 steps / 8 bit). Both current generators may be driven using an on- board temperature sensor, an external sensor, or Control Registers. The internal temperature sensor operates over a very broad temperature range (-40 °C to +100 °C). The sensor output (internal or external) drives a 6-bit A/D converter, whose output selects one of 64 bytes from each nonvolatile look-up table (LUT). The contents of the selected LUT row (8-bit wide) drives the input of an 8-bit D/A converter, which generates the output current. All control and setup parameters of the X9530, including the look-up tables, are programmable via the 2-wire serial port. The general purpose memory portion of the device is a CMOS serial EEPROM array with Xicor’s Block LockTM protection. This memory may be used to store fiber optic module manufacturing data, serial numbers, or various other system parameters. Vss A2 3 4 I2 R1 R2 Vcc A0 1 10 11 9 12 7 8 SCL 6 A1 2 WP 5 VRef VSense 13 14 I1 SDA TSSOP 14L Top View - Bumps Down CSP – B15 32 1 A B C D E A0 I2 VRef Vcc A1 VSense SCL A2 Vss SDA Vss R2 WP I1 R1 BLOCK DIAGRAM SDA SCL WP 2-Wire I2 VRef R2 VSense Interface A2, A1, A0 DAC 2 ADC Look-up Table 1 Look-up Table 2 Control & Status General Purpose Memory Mux Mux I1 R1 DAC 1 Mux Mux Temperature Sensor Voltage Reference |
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