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MC68HC11E1CFN2 Datasheet(PDF) 51 Page - Motorola, Inc |
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MC68HC11E1CFN2 Datasheet(HTML) 51 Page - Motorola, Inc |
51 / 268 page Operating Modes and On-Chip Memory Memory Map M68HC11E Family — Rev. 5 Data Sheet MOTOROLA Operating Modes and On-Chip Memory 51 REG[3:0] — 64-Byte Register Block Position These four bits specify the upper hexadecimal digit of the address for the 64-byte block of internal registers. The register block, positioned at the beginning of any 4-Kbyte page in the memory map, is initialized to address $1000 out of reset. Refer to Table 2-5. 2.3.3.3 System Configuration Options Register The 8-bit, special-purpose system configuration options register (OPTION) sets internal system configuration options during initialization. The time protected control bits, IRQE, DLY, and CR[1:0], can be written only once after a reset and then they become read-only. This minimizes the possibility of any accidental changes to the system configuration. Table 2-4. RAM Mapping Table 2-5. Register Mapping RAM[3:0] Address REG[3:0] Address 0000 $0000–$0xFF 0000 $0000–$003F 0001 $1000–$1xFF 0001 $1000–$103F 0010 $2000–$2xFF 0010 $2000–$203F 0011 $3000–$3xFF 0011 $3000–$303F 0100 $4000–$4xFF 0100 $4000–$403F 0101 $5000–$5xFF 0101 $5000–$503F 0110 $6000–$6xFF 0110 $6000–$603F 0111 $7000–$7xFF 0111 $7000–$703F 1000 $8000–$8xFF 1000 $8000–$803F 1001 $9000–$9xFF 1001 $9000–$903F 1010 $A000–$AxFF 1010 $A000–$A03F 1011 $B000–$BxFF 1011 $B000–$B03F 1100 $C000–$CxFF 1100 $C000–$C03F 1101 $D000–$DxFF 1101 $D000–$D03F 1110 $E000–$ExFF 1110 $E000–$E03F 1111 $F000–$FxFF 1111 $F000–$F03F Address: $1039 Bit 7 654321 Bit 0 Read: ADPU CSEL IRQE(1) DLY(1) CME CR1(1) CR0(1) Write: Reset: 00010000 1. Can be written only once in first 64 cycles out of reset in normal modes or at any time during special modes. = Unimplemented Figure 2-13. System Configuration Options Register (OPTION) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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