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UCC53X0 Datasheet(PDF) 4 Page - Texas Instruments |
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UCC53X0 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 47 page 1 VCC1 8 VEE2 2 IN+ 7 GND2 3 IN± 6 OUT 4 GND1 5 VCC2 Not to scale 1 VCC1 8 VEE2 2 IN+ 7 CLAMP 3 IN± 6 OUT 4 GND1 5 VCC2 Not to scale 1 VCC1 8 VEE2 2 IN+ 7 OUTL 3 IN± 6 OUTH 4 GND1 5 VCC2 Not to scale 4 UCC5310, UCC5320, UCC5350, UCC5390 SLLSER8B – JUNE 2017 – REVISED AUGUST 2017 www.ti.com Product Folder Links: UCC5310 UCC5320 UCC5350 UCC5390 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 6 Pin Configuration and Function UCC5320S and UCC5390S D Package 8-Pin SOIC Top View UCC5310M and UCC5350M D Package 8-Pin SOIC Top View UCC5320E and UCC5390E D Package 8-Pin SOIC Top View (1) P = Power, G = Ground, I = Input, O = Output Pin Functions PIN TYPE(1) DESCRIPTION NAME NO. UCC53x0S UCC53x0M UCC53x0E CLAMP — 7 — I Active Miller-clamp input found on the UCC5310M and UCC5350M used to prevent false turnon of the power switches. GND1 4 4 4 G Input ground. All signals on the input side are referenced to this ground. GND2 — — 7 G Gate-drive common pin. Connect this pin to the IGBT emitter. UVLO referenced to GND2 in the UCC5320E and UCC5390E variations. IN+ 2 2 2 I Noninverting gate-drive voltage-control input. The IN+ pin has a CMOS input threshold. This pin is pulled low internally if left open. Use Table 4 to understand the input and output logic of these devices. IN– 3 3 3 I Inverting gate-drive voltage control input. The IN– pin has a CMOS input threshold. This pin is pulled high internally if left open. Use Table 4 to understand the input and output logic of these devices. OUT — 6 6 O Gate-drive output for E and M versions. OUTH 6 — — O Gate-drive pullup output found on the UCC5320S and UCC5390S. OUTL 7 — — O Gate-drive pulldown output found on the UCC5320S and UCC5390S. VCC1 1 1 1 P Input supply voltage. Connect a locally decoupled capacitor to GND. Use a low-ESR or ESL capacitor located as close to the device as possible. VCC2 5 5 5 P Positive output supply rail. Connect a locally decoupled capacitor to VEE2. Use a low-ESR or ESL capacitor located as close to the device as possible. VEE2 8 8 8 P Negative output supply rail for E version, and GND for S and M versions. Connect a locally decoupled capacitor to GND2 for E version. Use a low- ESR or ESL capacitor located as close to the device as possible. |
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Similar Description - UCC53X0 |
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