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DRA781BRGABFRQ1 Datasheet(PDF) 2 Page - Texas Instruments |
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DRA781BRGABFRQ1 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 273 page  2 DRA780, DRA781, DRA782 DRA783, DRA786, DRA787 SPRS975C – AUGUST 2016 – REVISED JULY 2017 www.ti.com Submit Documentation Feedback Product Folder Links: DRA780 DRA781 DRA782 DRA783 DRA786 DRA787 Device Overview Copyright © 2016–2017, Texas Instruments Incorporated 1.2 Applications • Digital and Analog Radio • Hybrid Radio • DSP Audio Amplifier • Vehicle Connectivity Co-processor 1.3 Description The DRA78x processor is offered in a 367-ball, 15×15-mm, 0.65-mm ball pitch (0.8mm spacing rules can be used on signals) with Via Channel™ Array (VCA) technology, ball grid array (S-PBGA) package. The architecture is designed to deliver high-performance concurrencies for automotive co-processor, hybrid radio and amplifier applications in a cost-effective solution, providing full scalability from the DRA75x ("Jacinto 6 EP" and "Jacinto 6 Ex"), DRA74x "Jacinto 6", DRA72x "Jacinto 6 Eco", and DRA71x "Jacinto 6 Entry" family of infotainment processors. Additionally, TI provides a complete set of development tools for the ARM, and DSP, including C compilers and a debugging interface for visibility into source code execution. The DRA78x Jacinto 6 RSP (Radio Sound Processor) device family is qualified according to the AEC- Q100 standard. The device features a simplified power supply rail mapping which enables lower cost PMIC solutions. Device Information PART NUMBER PACKAGE BODY SIZE DRA78x S-PBGA (367) 15.0 mm × 15.0 mm |
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