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ANP015 Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers

Part # ANP015
Description  Application Note AP2011 High Efficiency Synchronous PWM Controller
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ANP015
Application Note
AP2011 High Efficiency Synchronous PWM Controller
Preliminary
Anachip Corp.
www.anachip.com.tw
Rev. A.0 Oct, 29, 2004
6/15
Voltage Clamping for High Input Voltage
Normally the MOSFETs AP2011 used can be bought easily, but always the easy-buying parts have 25V
VGS maximum rating. If we use AP2011 in more than 25V input voltage system, we need a voltage clamping
function for protecting the MOSFETs. AP2011 is built-in a 8V voltage drop circuit to clamp the voltage
between VIN to PGATE, and NGATE to GND. This 8V voltage will show in PVCC pin to GND and make PDRV to
PGATE always keep a VIN-8V voltage. In this function’s operation, first we add a capacitor outside in CAP pin
(Figure. 4), AP2011 will make a current to charge the outside capacitor by the resistor. And if that charging
current is large enough to make the voltage of that resistor larger than VBE of the PNP, the PNP will turn on
and have ICE passing through. This current will be mirrored to make charging current of CBOOST. We need
choose a suitable capacitor for CAP pin to make sure that charging current is enough for CBOOST. If Ccap
value is not enough, the P channel MOSFET may conduct a large short-through current during supply
transition.
VCC
outside inside
I
CAP
R
VCC
I
CE
Mirror
PGATE
PDRV
Cboost
0.7V
+
-
CAP
Ccap
Ccap > 20*Cboost
Cboost = 47nF (recommendation)
Figure 4. Voltage Clamping Function Circuit
Virtual Frequency Control
Virtual Frequency Control
 combines the advantages of constant frequency and constant off-time control in
a single mode of operation. This allows fix frequency, precision switching voltage regulator control with fast
transient response and the smallest solution size. Switch duty cycle can be adjusted from 0% to 100% on a
pulse by pulse basis when responding to transient conditions. Both 0% and 100% duty cycle operation can
be maintained for extended periods of time in response to load or line transients. Figure 5 depicts a
simplified operation of the Virtual Frequency Control technique: The VFC oscillator generates a pulse of a
known duration (VFC_Pulse). The regulator loop responds by returning a complementary feedback pulse
(FB_Pulse). The FB_Pulse duration is a result of external conditions such as inductor size, the voltage


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