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RT8889D Datasheet(PDF) 5 Page - Richtek Technology Corporation |
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RT8889D Datasheet(HTML) 5 Page - Richtek Technology Corporation |
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5 / 44 page  RT8889D 5 DS8889D-00 April 2015 www.richtek.com © Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Operation The RT8889D adopts the G-NAVPTM (Green Native AVP) which is Richtek's proprietary topology derived from finite DC gain of EA amplifier with current mode control, making it easy to set the droop to meet all Intel CPU requirements of AVP (Adaptive Voltage Positioning). The RT8889D adopts the G-NAVPTM controller, which is one type of current mode constant on-time control with DC offset cancellation. The approach can not only improve DC offset problem for increasing system accuracy but also can have fast transient response. For the RT8889D, when current feedback signal reaches COMP signal to generate an on-time width to achieve PWM modulation. TON GEN Generate the PWM1 to PWM3 sequentially according to the phase control signal from the Loop Control Protection Logic. SVID Interface/Configuration Registers/Control Logic The interface that receives the SVID signal from CPU and sends the relative signals to Loop Control Protection Logic to execute the action by CPU. The registers save the pin setting data from ADC output. The Control Logic controls the ADC timing and generates the digital code of the VID that is relative to VSEN. Loop Control Protection Logic It controls the power on sequence, the protection behavior, and the operational phase number. Current Balance Each phase current sense signal is sent to the current balance circuit which adjusts the on-time of each phase to optimize current sharing. Offset Cancellation Cancel the current/voltage ripple issue to get the accurate VSEN. UVLO Detect the PVCC and VCC voltage and issue POR signal as they are high enough. DAC Generate an analog signal according to the digital code generated by Control Logic. Soft-Start & Slew Rate Control Control the Dynamic VID slew rate of VSET according to the SetVID fast or SetVID slow. |
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