2

DS9081A-00 November 2016

www.richtek.com

RT9081A

©

Copyright 2016 Richtek Technology Corporation. All rights reserved.

is a registered trademark of Richtek Technology Corporation.

Functional Pin Description

Pin No.

Pin Name

Pin Function

1

VOUT

Power output for the LDO.

2 (Fixed)

NC

Test pin. Internal pull down by 2

A. This pin should be floating or connected to

ground.

2 (Adj)

ADJ

Power output for the LDO.

3

EN

LDO enable.

4

BIAS

EN and VIN, this will ensure RT9081A performance follows datasheet spec. For

more information please see Chip Enable Operation section.

5, 7 (Expose pad) GND

Ground. The exposed pad must be soldered to a large PCB and connected to

GND for maximum power dissipation.

6

VIN

Power input for the LDO.

Marking Information

For marking information, contact our sales representative

directly or through a Richtek distributor located in your

area.

Typical Application Circuit

Figure 1. Fixed Voltage Regulator

Figure 2. Adjustable Voltage Regulator

EN

VOUT

RT9081A

GND

VIN

1

6

3

5, 7 (Exposed Pad)

1.2V/500mA

4

BIAS

Enable

3.3V

2.5V

1µF (Effective value)

1µF

100nF

EN

VOUT

RT9081A

GND

VIN

1

6

3

5, 7 (Exposed Pad)

1.2V/500mA

4

BIAS

Enable

2

ADJ

33.2k

66.5k

2.5V

3.3V

R1

R2

1µF

100nF

1µF (Effective value)