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RT9081A-12GQZA Datasheet(PDF) 9 Page - Richtek Technology Corporation |
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RT9081A-12GQZA Datasheet(HTML) 9 Page - Richtek Technology Corporation |
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9 / 12 page  9 DS9081A-00 November 2016 www.richtek.com RT9081A © Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Application Information The RT9081A is a low voltage, low dropout linear regulator with input voltage VIN from 0.8V to 5.5V, VBIAS from 2.4V to 5.5V and adjusted output voltage from 0.8V to (VIN − VDROP). Output Voltage Setting For the RT9081A, the voltage on the ADJ pin sets the output voltage and is determined by the values of R1 and R2. The values of R1 and R2 can be calculated for any voltage using the formula given in Equation : OUT R1 + R2 V0.8V R2 Using lower values for R1 and R2 is recommended to reduces the noise injected from the FB pin. Note that R1 is connected from VOUT pin to ADJ pin, and R2 is connected from ADJ to GND. Chip Enable Operation The RT9081A goes into sleep mode when the EN pin is in a logic low condition. In this condition, the pass transistor, error amplifier, and band gap are all turned off. Dropout Voltage There are two power supply inputs VIN and VBIAS and only one output VOUT for the RT9081A, the Dropout voltage with these two different input also have different definition. VINDropout voltage is the voltage difference between VIN and VOUT when VOUT starts to decrease while reduce VIN level (for this condition, VBIAS needs high enough as specific value published in Electrical Characteristics table). VBIAS dropout voltage is the voltage difference between VBIAS and VOUT while VIN and BIAS pins are connected together and VOUT starts to decrease. CIN and COUT Selection The RT9081A is designed specifically to work with low ESR ceramic output capacitor for space saving and performance consideration. Using a ceramic capacitor with capacitance range from 1 μF (Effective value) to 10μF on the RT9081A output ensures stability. The input capacitor must be located at a distance of no more than 0.5 inch from the input pin of the chip. However, a capacitor with larger value and lower ESR (Equivalent Series Resistance) is recommended since it will provide better PSRR and line transient response. Any good quality ceramic capacitor can be used, CIN = 1 μF and CBIAS = 0.1μF or greater are recommended. Chip Enable Operation The RT9081A goes into sleep mode when the EN pin is in a logic low condition. In this condition, the pass transistor, error amplifier, and band gap are all turned off reducing the supply current to only 1 μA (max.). Consideration should be taken in the power on sequence, it is mandatory to ensure VBIAS > VOUT + 1.6V before both VEN > VIH and VIN > VOUT + 0.3V. The BIAS pin supplies voltage for the LDO control circuit, and powering up VBIAS first will ensure turn on time (tON) and output voltage accuracy (VOUT) to follow datasheet spec. Current Limit The RT9081A continuously monitors the output current to protect the pass transistor against abnormal operations. When an overload or short circuit is encountered, the current limit circuitry controls the pass transistor's gate voltage to limit the output within the predefined range. Thermal Considerations The junction temperature should never exceed the absolute maximum junction temperature TJ(MAX), listed under Absolute Maximum Ratings, to avoid permanent damage to the device. The maximum allowable power dissipation depends on the thermal resistance of the IC package, the PCB layout, the rate of surrounding airflow, and the difference between the junction and ambient temperatures. The maximum power dissipation can be calculated using the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TAis the ambient temperature, and θJA is the junction-to-ambient thermal resistance. For continuous operation, the maximum operating junction temperature indicated under Recommended Operating Conditions is 125 °C. The junction-to-ambient thermal resistance, θJA, is highly package dependent. For a |
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