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MDT10P41A1 Datasheet(PDF) 4 Page - Micon Design Technology Corporation |
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MDT10P41A1 Datasheet(HTML) 4 Page - Micon Design Technology Corporation |
4 / 11 page MDT10P41A1 This specification is subject to be changed without notice. Please visit our web site for the most updated information. http://www.mdtic.com.tw 4 of 4 2008/6 Ver.1.9 (1) IAR ( Indirect Address Register) : R0 (2) PC (Program Counter) : R2 Write PC, CALL --- always 0 LJUMP, JUMP, LCALL --- from instruction word RTWI, RET --- from STACK A9 A8 A7~A0 Write PC, JUMP, CALL --- from STATUS b5 (ROM 1K) LJUMP, LCALL --- from instruction word RTWI, RET --- from STACK Write PC --- from ALU LJUMP, JUMP, LCALL, CALL --- from instruction word RTWI, RET --- from STACK (3) STATUS (Status register) : R3 Bit Symbol Function 0 1 2 3 4 5 6—7 C HC Z PF —— page 0 —— Carry bit Half Carry bit Zero bit Power loss Flag bit Always read as high Page select bit : 0 : 000H --- 1FFH 1 : 200H --- 3FFH General purpose bit (4) MSR (Memory Select Register) : R4 (5) PORT A : R5 Bit 3-0 : PA0~PA3, I/O Register 6-4 : Always read as high. 7 : Always read as zero. (6) PORT B : R6 PB7~PB0, I/O Register (7) CPIO A, CPIO B (Control Port I/O Mode Register) The CPIO register is “write-only” =“0”, I/O pin in output mode; =“1”, I/O pin in input mode. |
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