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TMS5703135DPGEQQ1 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS5703135DPGEQQ1 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 172 page  TMS570LS3135, TMS570LS2135, TMS570LS2125 SPNS164C – APRIL 2012 – REVISED APRIL 2015 www.ti.com The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module is used to multiply the external frequency reference to a higher frequency for internal use. There are two FMPLL modules on this device. These modules, when enabled, provide two of the seven possible clock source inputs to the Global Clock Module (GCM). The GCM manages the mapping between the available clock sources and the device clock domains. The device also has an External Clock Prescaler (ECP) module that when enabled, outputs a continuous external clock on the ECLK pin (or ball). The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency. The DMA controller has 16 channels, 32 control packets, and parity protection on its memory. An MPU is built into the DMA to limit the DMA to prescribed areas of memory and to protect the rest of the memory system from any malfunction of the DMA. The Error Signaling Module (ESM) monitors all device errors and determines whether an interrupt is generated or the external ERROR pin is toggled when a fault is detected. The ERROR pin can be monitored externally as an indicator of a fault condition in the microcontroller. The External Memory Interface (EMIF) provides off-chip expansion capability with the ability to interface to synchronous DRAM (SDRAM) devices, asynchronous memories, peripherals or FPGA devices. Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R4F CoreSight debug features, an External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or only minimum impact on the program execution time of the application code. A Parameter Overlay Module (POM) can reroute flash accesses to internal memory or to the EMIF. This rerouting allows the dynamic calibration against production code of parameters and tables without rebuilding the code to explicitly access RAM or halting the processor to reprogram the data flash. With integrated safety features and a wide choice of communication and control peripherals, the TMS570LS31x5/21x5 device is an ideal solution for high-performance real-time control applications with safety-critical requirements. Device Information(1) PART NUMBER PACKAGE BODY SIZE TMS570LS2125ZWT NFBGA (337) 16.0 mm × 16.0 mm TMS570LS2125PGE LQFP (144) 20.0 mm × 20.0 mm TMS570LS2135ZWT NFBGA (337) 16.0 mm × 16.0 mm TMS570LS2135PGE LQFP (144) 20.0 mm × 20.0 mm TMS570LS3135ZWT NFBGA (337) 16.0 mm × 16.0 mm TMS570LS3135PGE LQFP (144) 20.0 mm × 20.0 mm (1) For more information, see Section 9, Mechanical Packaging and Orderable Information. 4 Device Overview Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback |
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