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9FGV0241AKLF Datasheet(PDF) 5 Page - Integrated Device Technology |
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9FGV0241AKLF Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 16 page 9FGV0241 2-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR IDT® 2-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR 5 9FGV0241 JUNE 22, 2017 Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the 9FGV0241. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Electrical Characteristics–Current Consumption Electrical Characteristics–Output Duty Cycle, Jitter, and Skew Characteristics PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES 1.8V Supply Voltage VDDxx Applies to All VDD pins -0.5 2.5 V 1,2 Input Voltage VIN -0.5 VDD+0.3V V 1, 3 Input High Voltage, SMBus VIHSMB SMBus clock and data pins 3.6V V 1 Storage Temperature Ts -65 150 °C 1 Junction Temperature Tj 125 °C 1 Input ESD protection ESD prot Human Body Model 2000 V 1 1Guaranteed by design and characterization, not 100% tested in production. 2 Operation under these conditions is neither implied nor guaranteed. 3 Not to exceed 2.5V. TA = TCOM or TIND; Supply Voltage per VDD of normal operation conditions, See Test Loads for Loading Conditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES IDDAOP VDDA, PLL Mode, All outputs active @100MHz 7 8 mA 1 IDDOP VDD, All outputs active @100MHz 15 18 mA 1 Suspend Supply Current IDDSUSP VDDxxx, PD# = 0, Wake-On-LAN enabled 6 8 mA 1 Powerdown Current IDDPD PD#=0 0.6 1 mA 1, 2 1Guaranteed by design and characterization, not 100% tested in production. 2Assuming REF is not running in power down state Operating Supply Current TA = TCOM or TIND; Supply Voltage per VDD of normal operation conditions, See Test Loads for Loading Conditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Duty Cycle tDC Measured differentially, PLL Mode 45 50 55 % 1 Skew, Output to Output tsk3 VT = 50% 34 50 ps 1 Jitter, Cycle to cycle tjcyc-cyc PLL mode 14 50 ps 1,2 1Guaranteed by design and characterization, not 100% tested in production. 2 Measured from differential waveform |
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