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HT48R068B Datasheet(PDF) 10 Page - Holtek Semiconductor Inc |
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HT48R068B Datasheet(HTML) 10 Page - Holtek Semiconductor Inc |
10 / 118 page Rev. 1.30 10 �e���a�� 0�� �01� Rev. 1.30 11 �e���a�� 0�� �01� HT48R068B/HT48R069B Enhanced I/O 8-Bit OTP MCU HT48R068B/HT48R069B Enhanced I/O 8-Bit OTP MCU Pin Description Pin Name Function OPT I/T O/T Descriptions PA0 PA0 PAPU PAWK ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p and wake-�p. PA1/P�D PA1 PAPU PAWK ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p and wake-�p. P�D CTRL0 — CMOS P�D o�tp�t PA�/TC0 PA� PAPU PAWK ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p and wake-�p. TC0 — ST — Exte�nal Time� 0 clock inp�t PA3/INT PA3 PAPU PAWK ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p and wake-�p. INT — ST — Exte�nal Inte���pt inp�t PA4/PWM0/TC1/AUD PA4 PAPU PAWK ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p and wake-�p. PWM0 CTRL0 — CMOS PWM o�tp�t TC1 — ST — Exte�nal Time� 1 clock inp�t AUD — — AN DAC o�tp�t PA�/OSC� PA� PAPU PAWK ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p and wake-�p. OSC� CO — OSC Oscillato� pin PA6/OSC1 PA6 PAPU PAWK ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p and wake-�p. OSC1 CO OSC — Oscillato� pin PA7/RES PA7 PAWK ST NMOS Gene�al p��pose I/O. Registe� ena�led wake-�p. RES CO ST — Reset inp�t PB0/SCOM0 PB0 PBPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p SCOM0 SCOMC — SCOM Softwa�e cont�olled 1/� �ias LCD COM PB1/SCOM1 PB1 PBPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p SCOM1 SCOMC — SCOM Softwa�e cont�olled 1/� �ias LCD COM PB�/SCOM� PB� PBPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p SCOM� SCOMC — SCOM Softwa�e cont�olled 1/� �ias LCD COM PB3/SCOM3 PB3 PBPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p SCOM3 SCOMC — SCOM Softwa�e cont�olled 1/� �ias LCD COM PB4�PB� PB4�PB� PBPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p PB6/SCSA PB6 PBPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p SCSA — ST — SPI Slave Select PB7/SCKA PB7 PBPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p SCKA — ST CMOS SPI Se�ial Clock PC0 PC0 PCPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p. PC1 PC1 PCPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p. PC�/PWM� PC� PCPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p. PWM� CTRL� — CMOS PWM o�tp�t PC3/PWM1 PC3 PCPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p. PWM1 CTRL0 — CMOS PWM o�tp�t PC4/XT� PC4 PCPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p. XT� CO — LXT Low f�eq�enc� c��stal pin PC�/XT1 PC� PCPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p. XT1 CO — LXT Low f�eq�enc� c��stal pin PC6 PC6 PCPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p . PC7 PC7 PCPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p. PD0/TC� PD0 PDPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p . TC� — ST — Exte�nal Time� � clock inp�t PD1/PWM3 PD1 PDPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p . PWM3 CTRL� — CMOS PWM o�tp�t PD� PD� PDPU ST CMOS Gene�al p��pose I/O. Registe� ena�led p�ll-�p . |
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