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HT48R002 Datasheet(PDF) 10 Page - Holtek Semiconductor Inc |
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HT48R002 Datasheet(HTML) 10 Page - Holtek Semiconductor Inc |
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10 / 71 page  Rev. 1.11 10 April 11, 2017 Rev. 1.11 11 April 11, 2017 HT48R002/HT48R003 Cost-Effective I/O 8-Bit OTP MCU HT48R002/HT48R003 Cost-Effective I/O 8-Bit OTP MCU Power-on Reset Characteristics Ta=25°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions VPOR VDD Start Voltage to Ensure Power-on Reset — — — — 100 mV RRVDD VDD Raising Rate to Ensure Power-on Reset — — 0.035 — — V/ms tPOR Minimum Time for VDD Stays at VPOR to Ensure Power-on Reset — — 1 — — ms Ti me V DD V PO R RR VD D t PO R System Architecture Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed totheinternalsystemarchitecture.Therangeofdevicestakeadvantageoftheusualfeaturesfound withinRISCmicrocontrollersprovidingincreasedspeedofoperationandenhancedperformance. Thepipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstruction executionareoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,withthe exceptionofbranchorcallinstructions.An8-bitwideALUisusedinpracticallyalloperations oftheinstructionset.Itcarriesoutarithmeticoperations,logicoperations,rotation,increment, decrement,branchdecisions,etc.Theinternaldatapathissimplifiedbymovingdatathroughthe AccumulatorandtheALU.CertaininternalregistersareimplementedintheDataMemoryand canbedirectlyorindirectlyaddressed.Thesimpleaddressingmethodsoftheseregistersalong withadditionalarchitecturalfeaturesensurethataminimumofexternalcomponentsisrequiredto provideafunctionalI/Osystemwithmaximumreliabilityandflexibility. Clocking and Pipelining Themainsystemclock,derivedfromHIRCoscillatorissubdividedintofourinternallygenerated non-overlappingclocks,T1~T4.TheProgramCounterisincrementedatthebeginningoftheT1 clockduringwhichtimeanewinstructionisfetched.TheremainingT2~T4clockscarryoutthe decodingandexecutionfunctions.Inthisway,oneT1~T4clockcycleformsoneinstructioncycle. Althoughthefetchingandexecutionofinstructionstakesplaceinconsecutiveinstructioncycles,the pipeliningstructureofthemicrocontrollerensuresthatinstructionsareeffectivelyexecutedinone instructioncycle.TheexceptiontothisareinstructionswherethecontentsoftheProgramCounter arechanged,suchassubroutinecallsorjumps,inwhichcasetheinstructionwilltakeonemore instructioncycletoexecute. Forinstructionsinvolvingbranches,suchasjumporcallinstructions,twoinstructioncyclesare requiredtocompleteinstructionexecution.Anextracycleisrequiredastheprogramtakesone cycletofirstlyobtaintheactualjumporcalladdressandthenanothercycletoactuallyexecutethe branch.Therequirementforthisextracycleshouldbetakenintoaccountbyprogrammersintiming sensitiveapplications. |
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