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HT46R003B Datasheet(PDF) 37 Page - Holtek Semiconductor Inc |
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HT46R003B Datasheet(HTML) 37 Page - Holtek Semiconductor Inc |
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37 / 76 page  Rev. 1.00 36 ��ne 1�� �01� Rev. 1.00 37 ��ne 1�� �01� HT46R003B Cost-Effective A/D 8-bit OTP MCU HT46R003B Cost-Effective A/D 8-bit OTP MCU Bit3 TEG:Timer/EventCounteractiveedgeselection Ineventcountermode(TM1~TM0=01) 0:Countonrisingedge 1:Countonfallingedge Inpulsewidthmeasurementmode(TM1~TM0=11) 0:Startcountingonfallingedge,stopontherisingedge 1:Startcountingonrisingedge,stoponthefallingedge Bit2~0 TPSC2~ TPSC0:Timerprescalarrateselection 000:fS 001:fS/2 010:fS/4 011:fS/8 100:fS/16 101:fS/32 110:fS/64 111:fS/128 Timer Mode Inthismode,theTimer/EventCountercanbeutilizedtomeasurefixedtimeintervals,providing aninternalinterruptsignaleachtimetheTimer/EventCounteroverflows.Tooperateinthismode, theOperatingModeSelectbitpair,TnM1/TnM0,intheTimerControlRegistermustbesettothe correctvalueasshown. Bit7 Bit6 1 0 Control Register Operating Mode Select Bits for the Timer Mode Inthismodetheinternalclockisusedasthetimerclock.ThetimerinputclocksourceisfSYS,fSYS/4 orfLIRC.However,thistimerclocksourceisfurtherdividedbyaprescaler,thevalueofwhichis determinedbythebitsTPSC2~TPSC0intheTimerControlRegister.Thetimer-onbit,TONmust besethightoenablethetimertorun.Eachtimeaninternalclockhightolowtransitionoccurs, thetimerincrementsbyone.Whenthetimerisfullandoverflows,aninterruptsignalisgenerated andthetimerwillreloadthevaluealreadyloadedintothepreloadregisterandcontinuecounting. Atimeroverflowconditionandcorrespondinginternalinterruptsaretwoofthewake-upsources. However,theinternalinterruptscanbedisabledbyensuringthattheTEbitsoftheINTC0register areresettozero. In cr em en t Ti me r C ont ro ll er Pr e sca le r Ou t put Ti me r + 1 Ti me r + 2 Ti me r + NT im er + N + 1 Timer Mode Timing Chart |
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