S7G2 datasheet(42/116 Pages) RENESAS

Part #	S7G2

Description	32-bit ARM Cortex-M4 microcontroller

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Manufacturer	RENESAS [Renesas Technology Corp]

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R01DS0262EU0100 Rev.1.00

Page 42 of 113

Feb 23, 2016

S7G2

2. Electrical Characteristics

Figure 2.2

Ripple waveform

2.3

AC Characteristics

2.3.1

Frequency

Note 1. FCLK must run at a frequency of at least 4 MHz when programming or erasing the flash memory.

Note 2. See section 9, Clock Generation Circuit in User's Manual for the relationship between the ICLK, PCLKA, PCLKB,

PCLKC, PCLKD, FCLK, and BCLK frequencies.

Note 3. When the ADC12 is used, the PCLKC frequency must be at least 1 MHz.

Note 1. Programming or erasing the flash memory is disabled in low-speed mode.

Note 2. See section 9, Clock Generation Circuit in User's Manual for the relationship between the ICLK, PCLKA, PCLKB,

PCLKC, PCLKD, FCLK, and BCLK frequencies.

Note 3. When the ADC12 is used, the PCLKC frequency must be set to at least 1 MHz.

Table 2.10

Operation frequency value in high-speed mode

Item

Symbol

Min

Typ

Max

Unit

Operation frequency

System clock (ICLK*2)

f

-

240

MHz

Peripheral module clock (PCLKA)*2

-

120

Peripheral module clock (PCLKB)*2

--

60

Peripheral module clock (PCLKC)*2

-*3

-60

Peripheral module clock (PCLKD)*2

-

120

Flash interface clock (FCLK)*2

-*1

-60

External bus clock (BCLK)*2

-

120

EBCLK pin output

-

60

SDCLK pin output

VCC ≥ 3.0 V

-

120

Table 2.11

Operation frequency value in low-speed mode

Item

Symbol

Min

Typ

Max

Unit

Operation frequency

System clock (ICLK)*2

f-

-

1

MHz

Peripheral module clock (PCLKA)*2

--

1

Peripheral module clock (PCLKB)*2

--

1

Peripheral module clock (PCLKC)*2,*3

-*3

-1

Peripheral module clock (PCLKD)*2

--

1

Flash interface clock (FCLK)*1, *2

--

1

External bus clock (BCLK)

-

1

EBCLK pin output

-

1

Vr(VCC)

VCC

1/fr(VCC)

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