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R5F56519ADLJ Datasheet(PDF) 1 Page - Renesas Technology Corp

Part # R5F56519ADLJ
Description  120-MHz, 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 1-MB flash memory,
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F56519ADLJ Datasheet(HTML) 1 Page - Renesas Technology Corp

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RX65N Group, RX651 Group
Renesas MCUs
Datasheet
R01DS0276EJ0100 Rev.1.00
Page 1 of 190
Aug 24, 2016
Features
■ 32-bit RXv2 CPU core
 Max. operating frequency: 120 MHz
Capable of 240 DMIPS in operation at 120 MHz
 Single precision 32-bit IEEE-754 floating point
 Two types of multiply-and-accumulation unit (between memories
and between registers)
 32-bit multiplier (fastest instruction execution takes one CPU clock
cycle)
 Divider (fastest instruction execution takes two CPU clock cycles)
 Fast interrupt
 CISC Harvard architecture with 5-stage pipeline
 Variable-length instructions: Ultra-compact code
 Supports the memory protection unit (MPU)
 JTAG and FINE (one-line) debugging interfaces
■ Low-power design and architecture
 Operation from a single 2.7- to 3.6-V supply
 Low power consumption: A product that supports all peripheral
functions draws only 0.19 mA/MHz (Typ.).
 RTC is capable of operation from a dedicated power supply.
 Four low-power modes
■ On-chip code flash memory
 Supports versions with up to 1 Mbytes of ROM
 No wait cycles at up to 50 MHz or when the ROM cache is hit, one-
wait state at up to 100 MHz, two-wait state at above 100 MHz
 User code is programmable by on-board or off-board programming.
■ On-chip SRAM
 256 Kbytes of SRAM (no wait cycles)
 8 Kbytes of standby RAM (backup on deep software standby)
■ Data transfer
 DMACAa: 8 channels
 DTCb: 1 channel
 EXDMAC: 2 channels
 DMAC for the Ethernet controller: 1 channel
■ Reset and supply management
 Power-on reset (POR)
 Low voltage detection (LVD) with voltage settings
■ Clock functions
 External crystal oscillator or internal PLL for operation at 8 to 24
MHz
 Internal 240-kHz LOCO and HOCO selectable from 16, 18, and 20
MHz
 120-kHz clock for the IWDTa
■ Real-time clock
 Adjustment functions (30 seconds, leap year, and error)
 Real-time clock counting and binary counting modes are selectable
 Time capture function
(for capturing times in response to event-signal input)
■ Independent watchdog timer
 120-kHz (1/2 LOCO frequency) clock operation
■ Useful functions for IEC60730 compliance
 Oscillation-stoppage detection, frequency measurement, CRCA,
IWDTa, self-diagnostic function for the A/D converter, etc.
 Register write protection function can protect values in important
registers against overwriting.
■ Various communications interfaces
 Ethernet MAC (1 channel)
 PHY layer (1 channel) for host/function or OTG controller
(1 channel) with full-speed USB 2.0 transfer
 CAN (compliant with ISO11898-1), incorporating 32 mailboxes
(up to 2 channels)
 SCIg and SCIh with multiple functionalities (up to 11 channels)
Choose from among asynchronous mode, clock-synchronous mode,
smart-card interface mode, simplified SPI, simplified I2C, and
extended serial mode.
 SCIi with 16-byte transmission and reception FIFOs
(up to 2 channels)
 I2C bus interface for transfer at up to 1 Mbps (up to 2 channels)
 Four-wire QSPI (1 channel) in addition to RSPIc (3 channels)
 Parallel data capture unit (PDC) for the CMOS camera interface
(not in 100-pin products)
 SD host interface (optional: 1 channel) with a 1- or 4-bit SD bus for
use with SD memory or SDIO
 SD slave interface (optional: 1 channel) with a 1- or 4-bit SD bus for
use with SD host interface
 MMCIF with 1-, 4-, or 8-bit transfer bus width
■ External address space
 Buses for full-speed data transfer (max. operating frequency of 60
MHz)
 8 CS areas
 8-, or 16-bit bus space is selectable per area
 Independent SDRAM area (128 Mbytes)
■ Up to 25 extended-function timers
 16-bit TPUa, and MTU3a
 8-bit TMRa (4 channels), 16-bit CMT (4 channels), 32-bit CMTW
(2 channels)
■ 12-bit A/D converter
 Two 12-bit units (8 channels for unit 0; 21 channels for unit 1)
 Self diagnosis
 Detection of analog input disconnection
■ 12-bit D/A converter: 2 channels
■ Temperature sensor for measuring temperature
within the chip
■ Encryption (optional)
 AES (key lengths: 128, 192, and 256 bits)
■ Up to 111 pins for general I/O ports
 5-V tolerance, open drain, input pull-up, switchable driving ability
■ Operating temp. range
 –40C to +85C
PLQP0144KA-B 20 × 20 mm, 0.5-mm pitch
PLQP0100KB-B 14 × 14 mm, 0.5-mm pitch
PTLG0145KA-A 7 × 7 mm, 0.5-mm pitch
PTLG0100JA-A 7 × 7 mm, 0.65-mm pitch
120-MHz, 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 1-MB flash memory,
256-KB SRAM, various communications interfaces including Ethernet MAC,
SD host interface (optional), SD slave interface (optional), quad SPI, and CAN, 12-bit A/D converter,
RTC, encryption (optional), CMOS camera interface
R01DS0276EJ0100
Rev.1.00
Aug 24, 2016
Features


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