Pin Description

Pin No.

Pin Name

I/O

Description

1

CDSCLK1

DI

CDS reference clock pulse input

2

CDSCLK2

DI

CDS data clock pulse input

3

ADCCLK

DI

A/D sample clock input for 3-channels mode

4OE

DI

Output enable, active low

5

DRVDD

P

Digital driver power

6

DRVSS

P

Digital driver ground

7~14

D7~D0

DO

Digital data output

15

SDATA

DI/DO

Serial data input/output

16

SCLK

DI

Clock input for serial interface

17

SLOAD

DI

Serial interface load pulse

19, 27

AVSS

P

Analog ground

18, 28

AVDD

P

Analog supply

20

REFB

AO

Reference decoupling

21

REFT

AO

Reference decoupling

22

VINB

AI

Analog input, blue

23

CML

AO

Internal reference output

24

VING

AI

Analog input, green

25

OFFSET

AO

Clamp bias level decoupling

26

VINR

AI

Analog input, red

Absolute Maximum Ratings

Storage Temperature ...........................

-50°Cto125°C

Operating Temperature ..........................

-25°Cto75°C

Note: These are stress ratings only. Stresses exceeding the range specified under

²Absolute Maximum Ratings² may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed

in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.

D.C. Characteristics

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Conditions

Logic Inputs

High Level Input Voltage

(CDSCLK1, CDSCLK2, ADCCLK,

OE, SCK, SLOAD)

¾¾

2

¾¾

V

Low Level Input Voltage (CDSCLK1,

CDSCLK2, ADCCLK, OE, SCK,

SLOAD)

¾¾

¾

¾

0.8

V

High Level Input Voltage (SDATA)

¾¾

2.5

¾¾

V

Low Level Input Voltage (SDATA)

¾¾

¾

¾

1.5

V

High Level Input Current

¾¾

¾

10

¾mA

Low Level Input Current

¾¾

¾

10

¾mA

Input Capacitance

¾¾

¾

10

¾

pF

HT82V26A

Rev. 1.20

3

February 8, 2012