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UCC27712D Datasheet(PDF) 5 Page - Texas Instruments

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Part # UCC27712D
Description  620-V, 1.8-A, 2.8-A High-Side Low-Side Gate Driver with Interlock
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

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UCC27712
www.ti.com
SLUSCE9 – JUNE 2017
Product Folder Links: UCC27712
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Copyright © 2017, Texas Instruments Incorporated
Electrical Characteristics (continued)
At VDD = VHB = 15 V, COM = VHS = 0, all voltages are with respect to COM, no load on LO and HO, –40°C < TJ < +125°C
(unless otherwise noted). Currents are positive into and negative out of the specified terminal.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(1)
Ensured by design, not tested in production
IQ
Total quiescent supply current
HI = LI = 0 V or 5 V, DC on/off state
180
255
420
µA
IQVDD
Quiescent VDD-COM supply current
HI = LI = 0 V or 5 V, DC on/off state
190
320
IQBS
Quiescent HB-HS supply current
HI = 0 V or 5 V, HO in DC on/off
state
65
100
IBL
Bootstrap supply leakage current
HB = HS = 600 V
20
IOP
Dynamic operating current
HI = LI = 0 V or 5 V, f = 100 kHz,
duty = 50%, CL= 1 nF
3800(1)
4500
INPUT AND SHUTDOWN BLOCK
VINH
Input Pin (HI, LI) high threshold
1.6
2.0
2.4
V
VINL
Input Pin (HI, LI) low threshold
0.8
1.2
1.5
VINHYS
Input Pin (HI, LI) threshold
hysteresis
0.8
IINL
HI, LI input low bias current
HI, LI = 0 V
–5
0
5
µA
IINH
HI, LI input high bias current
HI, LI = 5 V
1.7
70
OUTPUT BLOCK
VDD-VLOH
LO output high voltage
LI = 5 V, ILO = –20 mA
60
136
mV
VHB-VHOH
HO output high voltage
HI = 5 V, IHO = –20 mA
60
136
VLOL
LO output low voltage
LI = 0 V, ILO = 20 mA
30
80
VHOL
HO output low voltage
HI = 0 V, IHO = 20 mA
30
80
RLOL,
RHOL
LO, HO output pull-down resistance
ILO = IHO = 20 mA
1.5
4
Ω
RLOH,
RHOH
LO, HO output pull-up resistance
ILO = IHO = –20 mA
3.0
6.8
IGPK-
(1)
HO, LO output low short circuit
pulsed current
HI = LI = 0 V, HO = LO = 15 V, PW
< 10 µs
2.8
A
IGPK+
(1)
HO, LO output high short circuit
pulsed current
HI = LI = 5 V, HO = LO = 0 V, PW <
10 µs
–1.8
7.6 Dynamic Electrical Characteristics
At VDD = VHB = 15 V, COM = VHS = 0, all voltages are with respect to COM, no load on LO and HO, –40°C < TJ < +125°C
(unless otherwise noted). Currents are positive into and negative out of the specified terminal.
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
DYNAMIC CHARACTERISTICS
tPDLH
Turn-on propagation delay (without
deadtime)
LI to LO, HI to HO, HS = COM = 0 V
100
160
ns
tPDHL
Turn-off propagation delay
LI to LO, HI to HO, HS = COM = 0 V
100
160
tPDRM
Low-to-high delay matching
5
30
tPDFM
High-to-low delay matching
12
30
tRISE
Turn-on rise time
10% to 90%, HO/LO with 1000-pF
load
16
50
tFALL
Turn-off fall time
10% to 90%, HO/LO with 1000-pF
load
10
30
tON
Minimum HI/LI ON pulse that
changes output state
0-V to 5-V input signal on HI and LI
pins
25
45
tOFF
Minimum HI/LI OFF pulse that
changes output state
5-V to 0-V input signal on HI and LI
pins
35
45
DT
Deadtime
Internal deadtime for Interlock
100
150
200


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