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PCM1865-Q1 Datasheet(PDF) 2 Page - Texas Instruments |
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PCM1865-Q1 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 141 page 2 PCM1860-Q1, PCM1861-Q1, PCM1862-Q1 PCM1863-Q1, PCM1864-Q1, PCM1865-Q1 SLASE64A – DECEMBER 2014 – REVISED JUNE 2017 www.ti.com Product Folder Links: PCM1860-Q1 PCM1861-Q1 PCM1862-Q1 PCM1863-Q1 PCM1864-Q1 PCM1865-Q1 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Table of Contents 1 Features .................................................................. 1 2 Applications ........................................................... 1 3 Description ............................................................. 1 4 Revision History..................................................... 2 5 Device Comparison Table..................................... 6 6 Pin Configuration and Functions ......................... 7 7 Specifications....................................................... 11 7.1 Absolute Maximum Ratings .................................... 11 7.2 ESD Ratings............................................................ 11 7.3 Recommended Operating Conditions ..................... 11 7.4 Thermal Information ................................................ 11 7.5 Electrical Characteristics: PGA and ADC AC Performance............................................................. 12 7.6 Electrical Characteristics: DC ................................. 13 7.7 Electrical Characteristics: Digital Filter.................... 15 7.8 Timing Requirements: External Clock..................... 15 7.9 Timing Requirements: I2C Control Interface .......... 16 7.10 Timing Requirements: SPI Control Interface ....... 17 7.11 Timing Requirements: Audio Data Interface for Slave Mode .............................................................. 18 7.12 Timing Requirements: Audio Data Interface for Master Mode ............................................................ 19 7.13 Typical Characteristics .......................................... 20 8 Parameter Measurement Information ................ 22 9 Detailed Description ............................................ 24 9.1 Overview ................................................................. 24 9.2 Functional Block Diagrams ..................................... 24 9.3 Features Description .............................................. 27 9.4 Device Functional Modes........................................ 60 9.5 Programming........................................................... 62 10 Application and Implementation........................ 70 10.1 Application Information.......................................... 70 10.2 Typical Applications .............................................. 75 11 Power Supply Recommendations ..................... 79 11.1 Power-Supply Distribution and Requirements ...... 79 11.2 1.8-V Support ........................................................ 79 11.3 Brownout Conditions ............................................. 79 11.4 Power-Up Sequence ............................................. 80 11.5 Lowest Power-Down Modes ................................. 80 11.6 Power-On Reset Sequencing Timing Diagram .... 81 11.7 Power Connection Examples ................................ 82 11.8 Fade In .................................................................. 83 12 Layout................................................................... 84 12.1 Layout Guidelines ................................................. 84 12.2 Layout Example .................................................... 85 13 Register Map........................................................ 85 13.1 Register Map Description...................................... 85 13.2 Register Map Summary ........................................ 86 13.3 Page 0 Registers ................................................. 89 13.4 Page 1 Registers ............................................... 129 13.5 Page 3 Registers ............................................... 132 13.6 Page 253 Registers ........................................... 133 14 Device and Documentation Support ............... 134 14.1 Development Support ......................................... 134 14.2 Related Links ...................................................... 134 14.3 Receiving Notification of Documentation Updates.................................................................. 134 14.4 Community Resources........................................ 134 14.5 Trademarks ......................................................... 134 14.6 Electrostatic Discharge Caution .......................... 134 14.7 Glossary .............................................................. 134 15 Mechanical, Packaging, and Orderable Information ......................................................... 135 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (December 2014) to Revision A Page • Changed title for clarity........................................................................................................................................................... 1 • Added PCM1860-Q1, PCM1861-Q1, PCM1862-Q1, PCM1863-Q1, and PCM1864-Q1 devices and associated new content to data sheet .............................................................................................................................................................. 1 • Added AEC-Q100 and high SNR Performance feature bullets .............................................................................................. 1 • Added feature bullets to clarify hardware- and software-controlled devices .......................................................................... 1 • Changed one feature subbullet from "Fixed Mic Pregain Select: 20, 32 dB (Analog)" to two subbullets, "Fixed Gain: 12 dB, 32 dB (PCM1860-Q1, PCM1861-Q1)" and "Software-Controlled Gain: (PCM1862-Q1, PCM1863-Q1, PCM1864-Q1, PCM1865-Q1)" ............................................................................................................................................... 1 • Deleted subbullet, "Additional 1.8 V Core and Interface for Lower Power Consumption" ..................................................... 1 • Deleted feature subbullet, "Zero Crossing PGA Gain Changes"............................................................................................ 1 • Changed application bullets to align with automotive applications......................................................................................... 1 • Changed Description section text to clarify 3.3-V supply, integrated PGA, and additional front-end features ...................... 1 • Deleted Table 1, Typical Performance (3.3-V Supply, –1 dB-FS Input); redundant content ................................................. 6 • Changed Device Comparison Table; updated for clarity........................................................................................................ 6 • Changed XO (pin 9) I/O from "—" to "O". ............................................................................................................................ 10 |
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