Electronic Components Datasheet Search |
|
RAA458100GNP Datasheet(PDF) 9 Page - Renesas Technology Corp |
|
RAA458100GNP Datasheet(HTML) 9 Page - Renesas Technology Corp |
9 / 24 page RAA458100GNP Page 9 of 22 R19DS0096EJ0100 Rev.1.00 2017.02.28 8.7 Interruption Signal Output Function (INT_TX pin) Interruption signal (event detection signal) is outputted from INT_TX pin when WPT communication packet is received or protection is operated (refer to Table 8.6.1). Table 8.7.1 shows the events that interruption signal is outputted. Events to output the signal can be selected by setting enable registers. When enable register value is “1”, low level is outputted from INT_TX pin when applicable event is occurred. Reset register should be set to “1” in order to return to high level at INT_TX pin. If an event occurs continuously, low level is outputted again from INT_TX pin even though reset register is set to “1”. When enable register value is “0” (disable), low level is not outputted from INT_TX pin but applicable notification register is set to “1”. Table 8.7.1 Event to interruption signal output Event Notification register Enable register Reset register Condition to notify (Notification register is asserted.) WPT communication packet is received 0x1B D[1] 0x1B D[7] 0x1B D[0] Notification register is set to “1” when WPT communication packet is received in MCU Control Mode. WPT communication write completion 0x1B D[2] 0x1B D[7] 0x1B D[0] These events occur in ATPC Mode. RAA458100 can write or read register of receiver device (RAA457100) by WPT communication. When register write / read operation is normally performed in receiver device, command completion information is sent from receiver device. When this IC receives the information, notification register of write completion or read completion is set to “1” and interruption signal is outputted. When register write / read operation is not performed in receiver device, this IC recognizes as WPT communication error and then the bridge driver is stopped and restarted(restart operation). Register 0x1B D[4] is set to “1” when restart is performed. WPT communication read completion 0x1B D[3] Restart operation 0x1B D[4] Temperature protection 1 0x1D D[0] 0x1F D[0] 0x1C D[1] 0x1C D[0] Notification register is set to “1” and interruption signal is outputted when protection showed in Table 8.6.1 is detected except for under voltage lock out detection. Enable registers(0x1F D[5:0]) for interruption signal output are assigned for each event. If interruption signal output is not needed, register 0x1C D[1] should be set to “0”. When temperature protection 1, temperature protection 2, over voltage protection for bridge circuit, or maximum output pulse duty of bridge driver is detected in ATPC Mode, the bridge driver is stopped and restarted(restart operation). Register 0x1B D[4] is set to “1” when restart is performed. Temperature protection 2 0x1D D[1] 0x1F D[1] 0x1C D[1] Over voltage protection for bridge circuit 0x1D D[2] 0x1F D[2] 0x1C D[1] Short circuit protection for bridge circuit 0x1D D[3] 0x1F D[3] 0x1C D[1] Maximum output pulse duty of bridge driver 0x1D D[4] 0x1F D[4] 0x1C D[1] Over current protection for bridge circuit 0x1D D[5] 0x1F D[5] 0x1C D[1] 8. Functions Description |
Similar Part No. - RAA458100GNP |
|
Similar Description - RAA458100GNP |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |