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R7FS3A6783A01CFP Datasheet(PDF) 4 Page - Renesas Technology Corp |
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R7FS3A6783A01CFP Datasheet(HTML) 4 Page - Renesas Technology Corp |
4 / 129 page R01DS0308EU0100 Rev.1.00 Page 4 of 129 Apr 4, 2017 Features ■ ARM Cortex-M4 Core with Floating Point Unit (FPU) ARMv7E-M architecture with DSP instruction set Maximum operating frequency: 48 MHz Support for 4-GB address space ARM Memory Protection Unit (MPU) with 8 regions Debug and Trace: ITM, DWT, FPB, TPIU, ETB CoreSight debug port: JTAG-DP and SW-DP ■ Memory 256-KB code flash memory 8-KB data flash memory (up to 100,000 erase/write cycles) 32-KB SRAM Flash Cache (FCACHE) Memory Protection Units 128-bit unique ID ■ Connectivity USB 2.0 Full-Speed Module (USBFS) - On-chip transceiver with voltage regulator - Compliant with USB Battery Charging Specification 1.2 Serial Communications Interface (SCI) × 4 - UART - Simple I2C - Simple SPI Serial Peripheral Interface (SPI) × 2 I2C bus interface (IIC) × 2 CAN module (CAN) Serial Sound Interface Enhanced (SSIE) ■ Analog 14-Bit A/D Converter (ADC14) 12-Bit D/A Converter (DAC12) 8-Bit D/A Converter (DAC8) ×2 (for ACMPLP) Low-Power Analog Comparator (ACMPLP) × 2 Operational Amplifier (OPAMP) × 4 Temperature Sensor (TSN) ■ Timers General PWM Timer 32-Bit (GPT32) × 2 General PWM Timer 16-Bit (GPT16) × 6 Asynchronous General-Purpose Timer (AGT) × 2 Watchdog Timer (WDT) ■ Safety ECC in SRAM SRAM parity error check Flash area protection ADC self-diagnosis function Clock Frequency Accuracy Measurement Circuit (CAC) Cyclic Redundancy Check (CRC) calculator Data Operation Circuit (DOC) Port Output Enable for GPT (POEG) Independent Watchdog Timer (IWDT) GPIO readback level detection Register write protection Main oscillator stop detection Illegal memory access ■ System and Power Management Low power modes Realtime Clock (RTC) with calendar and Battery Backup support Event Link Controller (ELC) DMA Controller (DMAC) × 4 Data Transfer Controller (DTC) Key Interrupt Function (KINT) Power-on reset Low voltage detection with voltage settings ■ Security and Encryption AES128/256 GHASH True Random Number Generator (TRNG) ■ Human Machine Interface (HMI) Segment LCD Controller (SLCDC) - Up to 38 segments × 4 commons - Up to 34 segments × 8 commons Capacitive Touch Sensing Unit (CTSU) ■ Multiple Clock Sources Main clock oscillator (MOSC) (1 to 20 MHz when VCC = 2.4 to 5.5 V) (1 to 8 MHz when VCC = 1.8 to 2.4 V) (1 to 4 MHz when VCC = 1.6 to 1.8 V) Sub-clock oscillator (SOSC) (32.768 kHz) High-speed on-chip oscillator (HOCO) (24, 32, 48, 64 MHz when VCC = 2.4 to 5.5 V) (24, 32, 48 MHz when VCC = 1.8 to 5.5 V) (24, 32 MHz when VCC = 1.6 to 5.5 V) Middle-speed on-chip oscillator (MOCO) (8 MHz) Low-speed on-chip oscillator (LOCO) (32.768 kHz) Independent watchdog timer OCO (15 kHz) Clock trim function for HOCO/MOCO/LOCO Clock out support ■ General Purpose I/O Ports Up to 84 input/output pins - Up to 3 CMOS input - Up to 81 CMOS input/output - Up to 9 input/output 5 V tolerant - Up to 2 pins high current (20 mA) ■ Operating Voltage VCC: 1.6 to 5.5 V ■ Operating Temperature and Packages Ta = –40°C to +85°C - 100-pin LGA (7mm × 7mm, 0.65mm pitch) Ta = –40°C to +105°C - 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch) - 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch) - 64-pin QFN (8 mm × 8 mm, 0.4 mm pitch) - 48-pin LQFP (7mm × 7mm, 0.5mm pitch) - 48-pin QFN (7mm × 7mm, 0.5mm pitch) - 40-pin QFN (6mm × 6mm, 0.5mm pitch) High efficiency 48-MHz ARM Cortex-M4 microcontroller, 256-KB code flash memory, 32-KB SRAM, Segment LCD Controller, Capacitive Touch Sensing Unit, USB 2.0 Full-Speed, 14-Bit A/D Converter, 12-Bit D/A Converter, security and safety features. S3A6 Group MCUs (High Efficiency MCUs) 32-bit ARM® Cortex®-M4 Microcontroller Features |
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