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©2017 Integrated Device Technology, Inc.

June 16, 2017

853S54I-01 Datasheet

Applications Information

Wiring the Differential Input to Accept Single-Ended Levels

Figure 1 shows how a differential input can be wired to accept

generated by the bias resistors R1 and R2. The bypass capacitor

(C1) is used to help filter noise on the DC bias. This bias circuit

should be located as close to the input pin as possible. The ratio of

center of the input voltage swing. For example, if the input clock

requires that the sum of the output impedance of the driver (Ro)

and the series resistance (Rs) equals the transmission line

impedance. In addition, matched termination at the input will

attenuate the signal in half. This can be done in one of two ways.

First, R3 and R4 in parallel should equal the transmission line

impedance. For most 50

 applications, R3 and R4 can be 100.

The values of the resistors can be increased to reduce the loading

for slower and weaker LVCMOS driver. When using single-ended

signaling, the noise rejection benefits of differential signaling are

reduced. Even though the differential input can handle full rail

LVCMOS signaling, it is recommended that the amplitude be

reduced. The datasheet specifies a lower differential amplitude,

however this only applies to differential signals. For single-ended

of the recommended components might not be used, the pads

should be placed in the layout. They can be utilized for debugging

purposes. The datasheet specifications are characterized and

guaranteed by using a differential signal.

Figure 1. Recommended Schematic for Wiring a Differential Input to Accept Single-ended Levels

Recommendations for Unused Input and Output Pins

Inputs:

IN/nIN Inputs

For applications not requiring the use of the differential input, both

INx and nINx can be left floating. Though not required, but for

additional protection, a 1k

 resistor can be tied from INx to ground.

LVCMOS Control Pins

All control pins have internal pulldowns; additional resistance is not

required but can be added for additional protection. A 1k

 resistor

can be used.

Outputs:

LVPECL Outputs

All unused LVPECL outputs can be left floating. We recommend

that there is no trace attached. Both sides of the differential output

pair should either be left floating or terminated.